参数资料
型号: ISL62871HRUZ-T
厂商: Intersil
文件页数: 17/25页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 16-TQFN
标准包装: 3,000
系列: Robust Ripple Regulator™ (R³)
PWM 型: 控制器
输出数: 1
频率 - 最大: 330kHz
占空比: 100%
电源电压: 3.3 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -10°C ~ 100°C
封装/外壳: 16-UFQFN
包装: 带卷 (TR)
ISL62871, ISL62872
Adaptive Shoot-Through Protection
Adaptive shoot-through protection prevents a gate-driver
C INT = 100pF
R COMP
C COMP
output from turning on until the opposite gate-driver output
has fallen below approximately 1V. The dead-time shown in
Figure 12 is extended by the additional period that the falling
gate voltage remains above the 1V threshold. The high-side
-
FB
R FB
V OUT
gate-driver output voltage is measured across the UGATE
EA
and PHASE pins while the low-side gate-driver output
voltage is measured across the LGATE and PGND pins. The
power for the LGATE gate-driver is sourced directly from the
COMP
SREF
+
R OFS
PVCC pin. The power for the UGATE gate-driver is supplied
by a boot-strap capacitor connected across the BOOT and
PHASE pins. The capacitor is charged each time the phase
node voltage falls a diode drop below PVCC such as when
the low-side MOSFET is turned on.
FIGURE 13. COMPENSATION REFERENCE CIRCUIT
The LC output filter has a double pole at its resonant frequency
that causes rapid phase change. The R 3 modulator used in the
IC makes the LC output filter resemble a first order system in
which the closed loop stability can be achieved with the
recommended Type-II compensation network. Intersil provides
a PC-based tool that can be used to calculate compensation
1V
UGATE
1V
network component values and help simulate the loop
frequency response.
General Application Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to design a single-phase
power converter. It is assumed that the reader is familiar with
1V
LGATE
1V
many of the basic skills and techniques referenced in the
following. In addition to this guide, Intersil provides complete
reference designs that include schematics, bills of materials,
and example board layouts.
FIGURE 12. GATE DRIVER ADAPTIVE SHOOT-THROUGH
Compensation Design
Figure 13 shows the recommended Type-II compensation
Selecting the LC Output Filter
The duty cycle of an ideal buck converter is a function of the
input and the output voltage. This relationship is expressed
in Equation 30:
V O
circuit. The FB pin is the inverting input of the error amplifier.
The COMP signal, the output of the error amplifier, is inside the
D = ---------
V IN
(EQ. 30)
chip and unavailable to users. C INT is a 100pF capacitor
integrated inside the IC, connecting across the FB pin and the
The output inductor peak-to-peak ripple current is expressed
F SW ? L
COMP signal. R FB , R COMP , C COMP and C INT form the Type-II
compensator. The frequency domain transfer function is given
by Equation 29:
in Equation 31:
V O ? ( 1 – D )
I P-P = -------------------------------
(EQ. 31)
s ? R FB ? C INT ? ( 1 + s ? R COMP ? C
1 + s ? ( R FB + R COMP ) ? C COMP
)
G COMP ( s ) = --------------------------------------------------------------------------------------------------------------- (EQ. 29)
COMP
A typical step-down DC/DC converter will have an I PP of
20% to 40% of the maximum DC output load current. The
value of I P-P is selected based upon several criteria such as
MOSFET switching loss, inductor core loss, and the resistive
loss of the inductor winding. The DC copper loss of the
inductor can be estimated using Equation 32:
P COPPER = I LOAD ? DCR
2
(EQ. 32)
Where, I LOAD is the converter output DC current.
The copper loss can be significant so attention has to be
given to the DCR selection. Another factor to consider when
choosing the inductor is its saturation characteristics at
elevated temperature. A saturated inductor could cause
17
FN6707.0
August 14, 2008
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