参数资料
| 型号： | ISL62881HRTZ |
| 厂商： | Intersil |
| 文件页数： | 12/35页 |
| 文件大小： | 0K |
| 描述： | IC REG PWM SGL PHASE 28TQFN |
| 标准包装： | 75 |
| 应用： | 控制器，Intel IMVP-6.5? |
| 输入电压： | 5 V ~ 25 V |
| 输出数： | 1 |
| 输出电压： | 0.013 V ~ 1.5 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（4x4） |
| 包装： | 管件 |
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ISL62881, ISL62881B
CLOCK
VCRM
Theory of Operation
Multiphase R 3? Modulator
VW MASTER CLOCK CIRCUIT
MASTER COMP
CLOCK
The ISL62881 is a single-phase regulator implementing Intel ?
IMVP-6.5 ? protocol. It uses Intersil patented R 3? (Robust Ripple
Regulator ? ) modulator. The R 3? modulator combines the best
features of fixed frequency PWM and hysteretic PWM while
eliminating many of their shortcomings. Figure 5 conceptually
shows the ISL62881 R 3? modulator circuit, and Figure 6 shows
the operation principles.
GMVO
CRM
A current source flows from the VW pin to the COMP pin, creating
a voltage window set by the resistor between between the two
PHASE
CRS
VW
VCRS
SLAVE CIRCUIT
CLOCK S PWM
Q
R
GM
L
IL
VO
CO
pins. This voltage window is called VW window in the following
discussion.
Inside the IC, the modulator uses the master clock circuit to
generate the clocks for the slave circuit. The modulator
discharges the ripple capacitor C rm with a current source equal
to g m V o , where g m is a gain factor. C rm voltage V crm is a
sawtooth waveform traversing between the VW and COMP
VW
FIGURE 5. R 3? MODULATOR CIRCUIT
voltages. It resets to VW when it hits COMP, and generates a
one-shot clock signal.
The slave circuit has its own ripple capacitor C rs , whose voltage
mimics the inductor ripple current. A g m amplifier converts the
inductor voltage into a current source to charge and discharge
VCRM
COMP
C LO C K
PW M
VCRS
VW
H YS T ER E TIC
W IN D O W
C rs . The slave circuit turns on its PWM pulse upon receiving the
clock signal, and the current source charges C rs . When C rs
voltage V Crs hits VW, the slave circuit turns off the PWM pulse,
and the current source discharges C rs .
Since the ISL62881 works with V crs , which is large-amplitude
and noise-free synthesized signal, the ISL62881 achieves lower
phase jitter than conventional hysteretic mode and fixed PWM
mode controllers. Unlike conventional hysteretic mode
converters, the ISL62881 has an error amplifier that allows the
controller to maintain a 0.5% output voltage accuracy.
Figure 7 shows the operation principles during load insertion
response. The COMP voltage rises during load insertion,
FIGURE 6. R 3? MODULATOR OPERATION PRINCIPLES IN STEADY
STATE
VW
generating the clock signal more quickly, so the PWM pulse turns
on earlier, increasing the effective switching frequency, which
allows for higher control loop bandwidth than conventional fixed
frequency PWM controllers. The VW voltage rises as the COMP
voltage rises, making the PWM pulse wider. During load release
response, the COMP voltage falls. It takes the master clock
circuit longer to generate the next clock signal so the PWM pulse
is held off until needed. The VW voltage falls as the VW voltage
VCRM
COMP
falls, reducing the current PWM pulse width. This kind of
behavior gives the ISL62881 excellent response speed.
CLOCK
PWM
VW
VCRS
FIGURE 7. R 3? MODULATOR OPERATION PRINCIPLES IN LOAD
INSERTION RESPONSE
12
FN6924.3
June 16, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL62881HRTZ-T | 功能描述:直流/直流开关调节器 1 PHS PWM BUCKG FOR MICROPROCESR PWR SUP RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL62882 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs |
| ISL62882B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs |
| ISL62882BHRTZ | 功能描述:直流/直流开关调节器 2 PHS PWM BUCKG FOR MICROPROC PWR SUP RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL62882BHRTZR5411 | 制造商:Intersil Corporation 功能描述: |
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