参数资料
型号: ISL6307ACRZ-T
厂商: Intersil
文件页数: 22/33页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 48-QFN
标准包装: 4,000
PWM 型: 电压模式
输出数: 6
频率 - 最大: 275kHz
占空比: 66.7%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 48-VFQFN 裸露焊盘
包装: 带卷 (TR)
ISL6307A
voltage on EN_PWR, EN_VTT or VCC below the POR-
VR_RDY
falling threshold will reset the controller. Cycling the VID
codes will not reset the controller.
UV
OC
-
+
100μA
I 1
Overcurrent Protection
ISL6307A has two levels of overcurrent protection. Each
phase is protected from a sustained overcurrent condition on
50%
REPEAT FOR
EACH CHANNEL
a delayed basis, while the combined phase currents are
protected on an instantaneous basis.
DAC
REFERENCE
SOFT-START, FAULT
AND CONTROL LOGIC
-
OC1
+
I AVG
100μA
I AVG
IOUT
In instantaneous protection mode, the ISL6307A takes
advantage of the proportionality between the load current
and the average current, I AVG , to detect an overcurrent
condition. See the Channel-Current Balance section for
more detail on how the average current is measured. The
VDIFF
+
-
OV
+
OC2
-
2V
R IOUT
average current is continually compared with a constant
100 μ A reference current, as shown in Figure 12. Once the
average current exceeds the reference current, a
comparator triggers the converter to shutdown.
VID + 0.175V
OVP
In individual overcurrent protection mode, the ISL6307A
FIGURE 12. POWER GOOD AND PROTECTION CIRCUITRY
Undervoltage Detection
The undervoltage threshold is set at 50% of the VID voltage.
When the output voltage at VSEN is below the undervoltage
threshold, VR_RDY gets pulled low. When the output
voltage comes back to 60% of the VID voltage, VR_RDY will
return back to high.
Overvoltage Protection
Regardless of the VR being enabled or not, the over voltage
protection (OVP) circuit will be active after its POR. The OVP
thresholds are different under different operation conditions.
When VR is not enabled and before the second soft-start,
the OVP threshold is 1.275V. Once the controller detects a
continuously compares the current of each channel with the
same 100 μ A reference current. If any channel current
exceeds the reference current continuously for eight
consecutive cycles, the comparator triggers the converter to
shutdown.
The overcurrent protection level for the above two OCP
modes can be adjusted by changing the value of current
sensing resistors. In addition, ISL6307A can also adjust the
average OCP threshold level by adjusting the value of the
resistor from IOUT to GND, as seen in Figure 12. This
provides additional safety for the voltage regulator.
The following equation can be used to calculate the value of
the resistor R IOUT based on the desired OCP level I AVG,
OCP2 .
R IOUT = -------------------------------
valid VID input, the OVP trip point will be changed to the VID
voltage plus 175mV.
Two actions are taken by the ISL6307A to protect the
microprocessor load when an overvoltage condition occurs.
At the inception of an overvoltage event, all PWM outputs
are commanded low instantly (less than 20ns) until the
voltage at VDIFF falls below 0.4V. This causes the Intersil
drivers to turn on the lower MOSFETs and pull the output
voltage below a level that might cause damage to the load.
The PWM outputs remain low until VDIFF falls below 0.4V,
and then PWM signals enter a high-impedance state. The
Intersil drivers respond to the high-impedance input by
turning off both upper and lower MOSFETs. If the
overvoltage condition reoccurs, the ISL6307A will again
command the lower MOSFETs to turn on. The ISL6307A will
continue to protect the load in this fashion as long as the
overvoltage condition recurs.
Once an overvoltage condition is detected, normal PWM
operation ceases until the ISL6307A is reset. Cycling the
22
2
I AVG , OCP2
(EQ. 17)
FN9236.0
February 6, 2006
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