参数资料
型号: ISL6313CRZ-T
厂商: Intersil
文件页数: 10/33页
文件大小: 0K
描述: IC CTRLR PWM 2PHASE BUCK 36-QFN
产品培训模块: Solutions for Industrial Control Applications
标准包装: 4,000
应用: 控制器,Intel VR11,AMD CPU
输入电压: 5 V ~ 12 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 36-WFQFN 裸露焊盘
供应商设备封装: 36-TQFN 裸露焊盘(6x6)
包装: 带卷 (TR)
ISL6313
channel. Tie the ISEN+ pins to the VCORE side of their
corresponding channel’s sense capacitor.
Tying ISEN2- to VCC programs the part for single phase
operation.
UGATE1 and UGATE2
Connect these pins to the corresponding upper MOSFET
gates. These pins are used to control the upper MOSFETs
and are monitored for shoot-through prevention purposes.
BOOT1 and BOOT2
These pins provide the bias voltage for the corresponding
upper MOSFET drives. Connect these pins to appropriately
chosen external bootstrap capacitors. Internal bootstrap
diodes connected to the PVCC pin provides the necessary
bootstrap charge.
PHASE1 and PHASE2
Connect these pins to the sources of the corresponding
upper MOSFETs. These pins are the return path for the
upper MOSFET drives.
LGATE1 and LGATE2
These pins are used to control the lower MOSFETs. Connect
these pins to the corresponding lower MOSFETs’ gates.
SS
A resistor, R SS , placed from SS to ground or VCC, will set
the soft-start ramp slope. Refer to Equations 20 and 21 for
proper resistor calculation.
The state of the SS pin also selects which of the available DAC
tables will be used to decode the VID inputs and puts the
controller into the corresponding mode of operation. For Intel
VR11 mode of operation the R SS resistor should be tied to
ground. AMD compliance is selected if the R SS resistor is tied
to VCC.
PGOOD
For Intel mode of operation, PGOOD indicates whether VSEN
is within specified overvoltage and undervoltage limits after a
fixed delay from the end of soft-start. If VSEN exceeds these
limits, an overcurrent event occurs, or if the part is disabled,
PGOOD is pulled low. PGOOD is always low prior to the end
of soft-start.
For AMD modes of operation, PGOOD will always be high
as long as VSEN is within the specified undervoltage,
overvoltage window and soft-start has ended. PGOOD only
goes low if VSEN is outside this window.
Operation
only multi-phase converters can accomplish. The ISL6313
controller helps simplify implementation by integrating vital
functions and requiring minimal external components. The
“Block Diagram” on page 3 provides a top level view of
multi-phase power conversion using the ISL6313 controller.
I L1 + I L2 + I L3 , 7A/DIV
I L3 , 7A/DIV
PWM3, 5V/DIV
I L2 , 7A/DIV
PWM2, 5V/DIV
I L1 , 7A/DIV
PWM1, 5V/DIV
1 μ s/DIV
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS
FOR 3-PHASE CONVERTER
Interleaving
The switching of each channel in a multi-phase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 3-phase converter, each channel switches 1/3
cycle after the previous channel and 1/3 cycle before the
following channel. As a result, the three-phase converter has
a combined ripple frequency three times greater than the
ripple frequency of any one phase. In addition, the
peak-to-peak amplitude of the combined inductor currents is
reduced in proportion to the number of phases (Equations 1
and 2). Increased ripple frequency and lower ripple
amplitude mean that the designer can use less per-channel
inductance and lower total output capacitance for any
performance specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (I L1 , I L2 , and I L3 )
combine to form the AC ripple current and the DC load
current. The ripple component has 3x the ripple frequency of
each individual channel current. Each PWM pulse is
terminated 1/3 of a cycle after the PWM pulse of the previous
phase. The peak-to-peak current for each phase is about 7A,
and the DC components of the inductor currents combine to
feed the load.
To understand the reduction of ripple current amplitude in the
multi-phase circuit, examine the equation representing an
individual channel peak-to-peak inductor current.
( V IN – V OUT ) ? V OUT
L ? f S ? V
Multiphase Power Conversion
Microprocessor load current profiles have changed to the
I PP = ----------------------------------------------------------
IN
(EQ. 1)
point that using single-phase regulators is no longer a viable
solution. Designing a regulator that is cost-effective,
thermally sound, and efficient has become a challenge that
10
In Equation 1, V IN and V OUT are the input and output
voltages respectively, L is the single-channel inductor value,
and f S is the switching frequency.
FN6448.2
September 2, 2008
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