参数资料
型号: ISL6323BCRZ-T
厂商: Intersil
文件页数: 25/36页
文件大小: 0K
描述: IC PWM CTRLR SYNC BUCK DL 48QFN
标准包装: 4,000
应用: 控制器,AMD SVI
输入电压: 5 V ~ 12 V
输出数: 2
输出电压: 最高 2V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(7x7)
包装: 带卷 (TR)
ISL6323B
(if active) in a high-impedance state, and forces VDDPWRGD
low. This turns off all of the upper and lower MOSFETs. The
system remains in this state for fixed period of 12ms. If the
controller is still enabled at the end of this wait period, it will
attempt a soft-start, as shown in Figure 16. If the fault remains,
the trip-retry cycles will continue until either the fault is cleared
or for a total of seven attempts. If the fault is not cleared on the
final attempt, the controller disables UGATE and LGATE
signals for both Core and North Bridge and latches off requiring
a POR of VCC to reset the ISL6323B.
OUTPUT CURRENT, 50A/DIV
0A
OUTPUT VOLTAGE,
500mV/DIV
0V
3ms/DIV
FIGURE 16. OVERCURRENT BEHAVIOR IN HICCUP MODE
It is important to note that during soft start, the overcurrent
trip point is increased by a factor of 1.4. If the fault draws
enough current to trip overcurrent during normal run mode, it
may not draw enough current during the soft start ramp
period to trip overcurrent while the output is ramping up. If a
fault of this type is affecting the output, then the regulator will
complete soft start and the trip-retry counter will be reset to
zero. Once the regulator has completed soft start, the
overcurrent trip point will return to it’s nominal setting and an
overcurrent shutdown will be initiated. This will result in a
continuous hiccup mode.
Note that the energy delivered during trip-retry cycling is
much less than during full-load operation, so there is no
thermal hazard.
NORTH BRIDGE REGULATOR OVERCURRENT
The overcurrent shutdown sequence for the North Bridge
regulator is identical to the Core regulator with the exception
that it is a single phase regulator and will only disable the
MOSFET drivers for the North Bridge. Once 7 retry attempts
have been executed unsuccessfully, the controller will disable
UGATE and LGATE signals for both Core and North Bridge and
will latch off requiring a POR of VCC to reset the ISL6323B.
Note that the energy delivered during trip-retry cycling is
much less than during full-load operation, so there is no
thermal hazard.
25
OVERCURRENT PROTECTION IN POWER SAVINGS
MODE
While in Power Savings Mode, the OCP trip point will be
lower than when running in Normal Mode. Equation 20, with
N = 1, will yield the OCP trip point for the Core regulator
while in Power Savings mode.
If an overcurrent event should occur while the system is in
Power Savings Mode, the ISL6323B will restart in the
Normal state with the PSI_L bit set to 1.
Individual Channel Overcurrent Limiting
The ISL6323B has the ability to limit the current in each
individual channel of the Core regulator without shutting
down the entire regulator. This is accomplished by
continuously comparing the sensed currents of each channel
with a constant 140μA OCL reference current. If a channel’s
individual sensed current exceeds this OCL limit, the UGATE
signal of that channel is immediately forced low, and the
LGATE signal is forced high. This turns off the upper
MOSFET(s), turns on the lower MOSFET(s), and stops the
rise of current in that channel, forcing the current in the
channel to decrease. That channel’s UGATE signal will not
be able to return high until the sensed channel current falls
back below the 140μA reference.
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multiphase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
addition to this guide, Intersil provides complete reference
designs that include schematics, bills of materials, and example
board layouts for all common microprocessor applications.
Power Stages
The first step in designing a multiphase converter is to
determine the number of phases. This determination depends
heavily on the cost analysis which in turn depends on system
constraints that differ from one design to the next. Principally,
the designer will be concerned with whether components can
be mounted on both sides of the circuit board, whether
through-hole components are permitted, the total board space
available for power-supply circuitry, and the maximum amount
of load current. Generally speaking, the most economical
solutions are those in which each phase handles between
25A and 30A. All surface-mount designs will tend toward the
lower end of this current range. If through-hole MOSFETs and
inductors can be used, higher per-phase currents are
possible. In cases where board space is the limiting
constraint, current can be pushed as high as 40A per phase,
but these designs require heat sinks and forced air to cool the
MOSFETs, inductors and heat-dissipating surfaces.
MOSFETS
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct, the switching frequency,
FN6879.1
May 12, 2010
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