参数资料
型号: ISL6422BEVEZ-T
厂商: Intersil
文件页数: 15/18页
文件大小: 0K
描述: IC VREG DUAL LNB W/I2C 38EPTSSOP
标准包装: 2,500
应用: 转换器,卫星信号接收机顶盒设计
输入电压: 8 V ~ 14 V
输出数: 2
输出电压: 13.3 V ~ 18.3 V,14.3 V ~ 19.3 V
工作温度: -20°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-TFSOP (0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 38-TSSOP 裸露焊盘
包装: 带卷 (TR)
ISL6422B
TABLE 17. COMMAND REGISTER SR7 CONFIGURATION
SR7H
SR7M
SR7L
DCL2
VSPEN2 ISEL2R ISEL2H ISEL2L
FUNCTION
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
1
0
X
X
X
X
X
X
X
X
X
X
0
1
X
0
1
1
1
1
X
X
X
X
X
X
0
0
1
1
X
X
X
X
X
X
0
1
0
1
X
X
X
SR7 is selected
IOUT1 limit threshold = 305mA typ
IOUT1 limit threshold = 388mA typ
IOUT1 limit threshold = 570mA typ
IOUT1 limit threshold = 705mA typ
IOUT1 limit threshold = 890mA typ
Dynamic current limit NOT selected
Dynamic current limit selected
SELVTOP H/W pin Enabled
SELVTOP H/W pin Disabled
NOTE: X indicates “Read Only” and is a “Don’t Care” for the Write mode.
TABLE 18. CONTROL REGISTER SR8 CONFIGURATION
SR8H
SR8M
SR8L
EN2
X
X
VTOP2 VBOT2
FUNCTION
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
1
1
0
0
1
1
0
0
1
1
X
0
0
1
0
1
0
1
0
1
0
1
0
1
X
SR4 is selected
VSPEN2 = SELVTOP2 = 0, VOUT1 = 13V, VBOOST1 = 13V + VDROP
VSPEN2 = SELVTOP2 = 0, VOUT1 = 14V, VBOOST1 = 14V + VDROP
VSPEN2 = SELVTOP2 = 0, VOUT1 = 13V, VBOOST1 = 13V + VDROP
VSPEN2 = SELVTOP2 = 0, VOUT1 = 14V, VBOOST1 = 14V + VDROP
VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 18V, VBOOST1 = 18V + VDROP
VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 18V, VBOOST1 = 18V + VDROP
VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 19V, VBOOST1 = 19V + VDROP
VSPEN2 = 0, SELVTOP2 = 1, VOUT1 = 19V, VBOOST1 = 19V + VDROP
VSPEN2 = 1, SELVTOP2 = X VOUT1 = 13V, VBOOST1 = 13V + VDROP
VSPEN2 = 1, SELVTOP2 = X VOUT1 = 14V, VBOOST1 = 14V + VDROP
VSPEN2 = 1, SELVTOP2 = X VOUT1 = 18V, VBOOST1 = 18V + VDROP
VSPEN2 = 1, SELVTOP2 = X VOUT1 = 19V, VBOOST1 = 19V + VDROP
PWM and Linear for Channel 1 disabled
NOTE: X indicates “Read Only” and is a “Don’t Care” for the Write mode.
Received Data ( I 2 C bus READ MODE)
The ISL6422B can provide to the master a copy of the
system register information via the I 2 C bus in read mode.
The read mode is Master activated by sending the chip
address with R/W bit set to 1. At the following Master
generated clock bits, the ISL6422B issues a byte on the
SDA data bus line (MSB transmitted first).
At the ninth clock bit the MCU master can:
? Acknowledge the reception, starting in this way the
transmission of another byte from the ISL6422B.
? Not acknowledge, stopping the read mode
communication.
15
While the whole register is read back by the microprocessor,
the read-only bits, OUC1, OUC2 - Over or Undercurrent bit,
UV1, UV2 - Over or Undervoltage bit, TPR1, TPR2 - Tone
present bit, OTF - Over-temperature fault bit convey
diagnostic information about the ISL6422B.
Power–On I 2 C Interface Reset
The I 2 C interface built into the ISL6422B is automatically reset
at power-on. The I 2 C interface block will receive a Power OK
logic signal from the UVLO circuit. This signal will go HIGH
when chip power is OK. As long as this signal is LOW, the
interface will not respond to any I 2 C commands and the
system register SR1 and SR2 are initialized to all zeros, thus
FN6486.1
August 10, 2007
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