参数资料
型号: ISL6422BEVEZ-T
厂商: Intersil
文件页数: 5/18页
文件大小: 0K
描述: IC VREG DUAL LNB W/I2C 38EPTSSOP
标准包装: 2,500
应用: 转换器,卫星信号接收机顶盒设计
输入电压: 8 V ~ 14 V
输出数: 2
输出电压: 13.3 V ~ 18.3 V,14.3 V ~ 19.3 V
工作温度: -20°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-TFSOP (0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 38-TSSOP 裸露焊盘
包装: 带卷 (TR)
ISL6422B
Absolute Maximum Ratings
Thermal Information
Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 18.0V
Thermal Resistance (Typical, Notes 2, 3)
θ JA (°C/W)
θ JC (°C/W)
Logic Input Voltage Range
(SDA, SCL, ADDR0/1, CS1/2, EXTM1/2,
SELVTOP1/, TCAP1/2, TDIN1/2, TXT1/2) . . . . . . . . . -0.5V to 7V
EPTSSOP Package . . . . . . . . . . . . . . . 29 4
QFN Package. . . . . . . . . . . . . . . . . . . . 34 6
Maximum Junction Temperature (Note 4) . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . -40°C to +150°C
Operating Temperature Range . . . . . . . . . . . . . . . . . -20°C to +85°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
2. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θ JC , the "case temp" location is the center of the exposed metal pad on the package underside.
4. The device junction temperature should be kept below +150°C. Thermal shut-down circuitry turns off the device if junction temperature exceeds
+150°C typically.
Electrical Specifications
V CC = 12V, T A = -20°C to +85°C, unless otherwise noted. Typical values are at T A = +25°C. EN1/2 = H,
VTOP1/2 = L, VBOT1/2 = L, ENT1/2 = L, DCL = L, MSEL1/2 = L, I OUT = 12mA, unless otherwise noted. See
software description section for I 2 C access to the system.
PARAMETER
Operating Supply Voltage Range
Standby Supply Current
Supply Current
SYMBOL
I IN
TEST CONDITIONS
EN1 = EN2 = L
EN1 = EN2 = VTOP1 = VTOP2 = VBOT1 =
MIN
8
-
-
TYP
12
1.5
4.0
MAX
14
3.0
8.0
UNITS
V
mA
mA
VBOT2 = ENT1 = ENT2 = H, No Load
UNDERVOLTAGE LOCKOUT
Start Threshold
Stop Threshold
Start to Stop Hysteresis
7.50
7.00
350
-
-
400
7.97
7.55
500
V
V
mV
SOFT-START
COMP Rise Time (Note 5)
(Note 5)
-
8196
-
Cycles
Output Voltage (Note 5)
Line Regulation
Load Regulation
V O1
V O1
V O1
V O1
V O2
V O2
V O2
V O2
DV O1,
DV O2
DV O1,
DV O2
(Refer to Table 11)
(Refer to Table 11)
(Refer to Table 11)
(Refer to Table 11)
(Refer to Table 15)
(Refer to Table 15)
(Refer to Table 15)
(Refer to Table 15)
V IN = 8V to 14V; V O1 , V O2 = 13V
V IN = 8V to 14V; V O1 , V O2 = 18V
I O = 12mA to 350mA
I O = 12mA to 750mA (Note 6)
13.04
14.02
17.94
19.00
13.04
14.02
17.94
19.00
-
-
-
-
13.30
14.30
18.30
19.30
13.30
14.30
18.30
19.30
4.0
4.0
50
100
13.56
14.58
18.66
19.68
13.56
14.58
18.66
19.68
40.0
60.0
80
200
V
V
V
V
V
V
V
V
mV
mV
mV
mV
5
FN6486.1
August 10, 2007
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