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| 型号： | ISL6524CBZ |
| 厂商： | Intersil |
| 文件页数： | 8/16页 |
| 文件大小： | 0K |
| 描述： | IC CTLR VRM8.5 PWM TRPL 28-SOIC |
| 标准包装： | 26 |
| 应用： | 控制器，Intel VRM8.5 |
| 输入电压： | 10.8 V ~ 13.2 V |
| 输出数： | 4 |
| 输出电压： | 多重 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | * |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | * |
| 包装： | 管件 |
| 产品目录页面： | 1244 (CN2011-ZH PDF) |
VSEN3, or VSEN4) is ignored until the respective UP signal
10V
ATX 12V
VTTPG
goes high. This allows V OUT3 and V OUT4 to increase
without fault at start-up. Following an overcurrent event
(OC1, UV2, or UV3 event), bringing the SS24 pin below 0.8V
resets the overcurrent latch and generates a soft-started
ATX 5V
SS13
ramp-up of the outputs 1, 2, and 3.
SS24
UV3
SS13UP
0V
3.0V
ATX 3.3V
PGOOD
OC1
OC
LATCH
S Q
INHIBIT1,2,3
V OUT4 (1.8V)
V OUT1 (1.65V)
4V
SS13
R
COUNTER
R
SSDOWN
0V
V OUT3 (1.5V)
V OUT2 (1.2V)
0.8V
SS24
4V
OV
UV4
SS24UP
POR
R
FAULT
LATCH
S Q
R Q
FAULT
T0
T1
T2
T3
T4 T5
COUNTER
TIME
FIGURE 6. SOFT-START INTERVAL
The T2 to T3 time interval is dependent upon the value of
C SS13 . The same capacitor is also responsible for the ramp-
up time of the OUT1 and OUT3 voltages. If selecting a
UV2
R
S Q
OC
LATCH
FIGURE 7. FAULT LOGIC - SIMPLIFIED SCHEMATIC
different capacitor then recommended in the circuit application
literature, consider the effects the different value will have on
the ramp-up time and inrush currents of the OUT1 and OUT3
outputs.
Fault Protection
All four outputs are monitored and protected against extreme
overload. The chip’s response to an output overload is
selective, depending on the faulting output.
An overvoltage on V OUT1 output (VSEN1) disables outputs
1, 2, and 3, and latches the IC off. An undervoltage on
V OUT4 output latches the IC off. A single overcurrent event
on output 1, or an undervoltage event on output 2 or 3,
increments the respective fault counters and triggers a
shutdown of outputs 1, 2, and 3, followed by a soft-start re-
start. After three consecutive fault events on either counter,
the chip is latched off. Removal of bias power resets both the
fault latch and the counters. Both counters are also reset by
a successful start-up of all the outputs.
Figure 6 shows a simplified schematic of the fault logic. The
overcurrent latches are set dependent upon the states of the
overcurrent (OC1), output 2 and 3 undervoltage (UV2, UV3)
and the soft-start signals (SS13, SS24). Window
comparators monitor the SS pins and indicate when the
respective C SS pins are fully charged to above 4.0V (UP
signals). An undervoltage on either linear output (VSEN2,
8
OUT1 Overvoltage Protection
The overvoltage circuit provides protection during the initial
application of power. For voltages on the VCC pin below the
power-on reset level (and above ~4V), the output level is
monitored for voltages above 1.3V. Should VSEN1 exceed
this level, the lower MOSFET, Q2, is driven on.
Overcurrent Protection
All outputs are protected against excessive overcurrents.
The PWM controller uses the upper MOSFET’s on-
resistance, r DS(ON) to monitor the current for protection
against a shorted output. All linear regulators monitor their
respective VSEN pins for undervoltage to protect against
excessive currents.
Figure 8 illustrates the overcurrent protection with an overload
on OUT1. The overload is applied at T0 and the current
increases through the inductor (L OUT1 ). At time T1, the OC1
comparator trips when the voltage across Q1 (i D ? r DS(ON) )
exceeds the level programmed by R OCSET . This inhibits
outputs 1, 2, and 3, discharges the soft-start capacitor C SS24
with 28mA current sink, and increments the counter. Soft-start
capacitor C SS13 is quickly discharged. C SS13 starts ramping
up at T2 and initiates a new soft-start cycle. With OUT2 still
overloaded, the inductor current increases to trip the
overcurrent comparator. Again, this inhibits the outputs, but
the C SS24 soft-start voltage continues increasing to above
FN9015.3
April 18, 2005
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| ISL6524CBZA | 功能描述:IC CTRLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6524CBZA-T | 功能描述:IC CTLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
| ISL6524CBZ-T | 功能描述:IC CTLR VRM8.5 PWM TRPL 28-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
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