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参数资料
| 型号： | ISL6524EVAL1 |
| 厂商： | Intersil |
| 文件页数： | 2/12页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD VRM8.5 ISL6524 |
| 标准包装： | 1 |
| 主要目的： | 特殊用途 DC/DC，VRM 电源 |
| 输出及类型： | 4，非隔离 |
| 输出电压： | 1.05 ~ 1.825V，1.2V，1.5V，1.8V |
| 电流 - 输出： | 14A，1A，1A，1A |
| 输入电压： | 3.3V，5V，12V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 200kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6524 |
Application Note 9925
Reference Design
TABLE 1. ISL6523EVAL1 MAXIMUM OUTPUT LOADING
General
The evaluation board is built on 2-ounce, 4-layer, printed circuit
board (contact Intersil for layout plots). Most of the components
specific to the evaluation board alone, which are not needed in
a real computer application, are placed on the bottom side of
the board. Left on top of the evaluation board are the
components necessary to exemplify a typical application, as
well as the user interface (input/output terminals, test points,
switches, etc.).
OUTPUT
VOLTAGE
ISL6523EVAL1
V CORE
(VOUT1)
1.2VVTT
(VOUT2)
1.5VAGP
I OUT
22.0A(pk)
14.0A(avg)
10.0A(pk)
4.0A(avg)
3.0A(pk)
dI OUT /dt
20A/ μ s
1A/ μ s
1A/ μ s
TOLERANCE
(STATIC/
DYNAMIC)
Note 1
5% /9%
3% /5%
(VOUT3)
1.0A(avg)
80
1.8VMCH
(VOUT4)
3.0A(pk)
1.0A(avg)
1A/ μ s
3% /5%
60
ISL6524EVAL1
40
V CORE
22.0A(pk)
20A/ μ s
Note 1
(VOUT1)
14.0A(avg)
20
0
-20
-40
1.2VVTT
(VOUT2)
1.5VAGP
(VOUT3)
1.8VMCH
6.0A(pk)
1.0A(avg)
3.0A(pk)
1.0A(avg)
3.0A(pk)
1A/ μ s
1A/ μ s
1A/ μ s
5% /9%
3% /5%
3% /5%
(VOUT4)
1.0A(avg)
-60
IDEAL LOAD LINE
STATIC TOLERANCE
NOTE:
-80
DYNAMIC TOLERANCE
1. See Figure 1 for regulation tolerance details.
0
2
4
6
8
10 12
14
16
18
20
22
I OUT (A)
FIGURE 1. VOUT1 REGULATION ENVELOPE
VOUT1 Regulation
The core regulator (VOUT1) was designed to meet the
regulation envelope detailed in Figure 1. With a DAC-set
regulation point of 1.750V, the output voltage conforms to the
regulation limits shown. Although the droop pictured
(difference between voltage at a lesser load and voltage at a
higher load) will be the same regardless of the DAC setting,
the offset shown will exhibit a proportional dependence. The
resistive divider sets this offset at 2.57%. For example, the
ideal load line at no load and 1.600V DAC setting will
actually originate at 41mV positive offset.
Design Envelope
Although an actual computer system application may have
somewhat different requirements, the ISL6523EVAL1 and
ISL6524EVAL1 boards were designed to meet the maximum
output loading described in Table 1. Dynamic output
tolerances and current ratings can be adjusted by properly
selecting the components external to the ISL6523 or
ISL6524.
From a thermal performance perspective, do not operate the
evaluation board for extended periods of time at output current
levels exceeding the design envelope, as detailed in Table 1.
Performance
Figures 2 through 8 depict the evaluation boards’
performance during typical operational situations.To
simulate minimum loading conditions, unless otherwise
specified, the outputs were loaded with 65 ? resistive loads.
As performance is very similar amongst the two evaluation
boards, some characteristics were shown for only one of
them, with the implicit understanding of similarity (as
appropriate).
Soft-Start Start-Up
Figure 2 shows a typical ISL6524EVAL1 start-up. For this
capture, the ATX supply powering the board is turned on, at
time T0. At time T1, the 1.8VMCH output starts ramping up,
maintaining less than a 2V difference to the ATX3.3V output
(sensed at the VAUX pin). At time T2, all input voltages
reach regulation, and the 1.2VVTT output starts its ramp-up.
At time T3, the 1.2VVTT output reaches VTT_PGOOD
threshold and SS13 is released. Shortly after T3, the still
rising SS24 brings the 1.8VMCH output in regulation. At T4,
the SS13 clamp starts releasing outputs 1 and 3 (V CORE
and 1.5VAGP), allowing them to ramp up to their regulation
levels. At time T5, all outputs controlled by the ISL6524 are
within regulation limits.
2
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相关代理商/技术参数 |
参数描述 |
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| ISL6525CB | 功能描述:IC REG CTRLR BUCK PWM VM 14-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR) |
| ISL6525CB-T | 功能描述:IC REG CTRLR BUCK PWM VM 14-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR) |
| ISL6525CBZ | 功能描述:电压模式 PWM 控制器 VTT REG FORVRM 8.5 1 4LD RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6525CBZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 14-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6526ACB | 功能描述:IC REG CTRLR BUCK PWM VM 14-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR) |
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