参数资料
型号: ISL6530CBZ-T
厂商: Intersil
文件页数: 1/17页
文件大小: 0K
描述: IC CONTROLLER INTEL 24SOIC
标准包装: 1
应用: 控制器,Intel Pentium? III,IV
输入电压: 4.5 V ~ 5.5 V
输出数: 2
输出电压: 2.5V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC
包装: 标准包装
其它名称: ISL6530CBZ-TDKR
?
ISL6530
Data Sheet
November 15, 2004
FN9052.2
Dual 5V Synchronous Buck Pulse-Width
Modulator (PWM) Controller for DDRAM
Memory V DDQ and V TT Termination
The ISL6530 provides complete control and protection for
dual DC-DC converters optimized for high-performance
DDRAM memory applications. It is designed to drive low
cost N-channel MOSFETs in synchronous-rectified buck
topology to efficiently generate 2.5V V DDQ for powering
DDRAM memory, V REF for DDRAM differential signalling,
and V TT for signal termination. The ISL6530 integrates all of
the control, output adjustment, monitoring and protection
functions into a single package.
The V DDQ output of the converter is maintained at 2.5V
through an integrated precision voltage reference. The V REF
output is precisely regulated to 1/2 the memory power
supply, with a maximum tolerance of ± 1% over temperature
and line voltage variations. V TT accurately tracks V REF .
During V2_SD sleep mode, the V TT output is maintained by
a low power window regulator.
The ISL6530 provides simple, single feedback loop, voltage-
mode control with fast transient response. It includes two
phase-locked 300kHz triangle-wave oscillators which are
displaced 90 o to minimize interference between the two
PWM regulators. The regulators feature error amplifiers with
a 15MHz gain-bandwidth product and 6V/ μ s slew rate which
enables high converter bandwidth for fast transient
performance. The resulting PWM duty ratio ranges from 0%
to 100%.
The ISL6530 protects against over-current conditions by
inhibiting PWM operation. The ISL6530 monitors the current
in the V DDQ regulator by using the r DS(ON) of the upper
MOSFET which eliminates the need for a current sensing
resistor.
Ordering Information
Features
? Provides V DDQ , V REF , and V TT voltages for one- and two-
channel DDRAM memory systems
? Excellent voltage regulation
- V DDQ = 2.5V ± 2% over full operating range
- V REF = (V DDQ ÷ 2) ± 1% over full operating range
- V TT = V REF ± 30mV
? Supports ‘S3’ sleep mode
- V TT is held at V DDQ ÷ 2 via low power window regulator
to minimize wake-up time
? Fast transient response
- Full 0% to 100% duty ratio
? Operates from +5V input
? Overcurrent fault monitor on VDD
- Does not require extra current sensing element
- Uses MOSFET’s r DS(ON)
? Drives inexpensive N-Channel MOSFETs
? Small converter size
- 300kHz fixed frequency oscillator
? 24 Lead, SOIC or 32 Lead, 5mm × 5mm QFN
? Pb-Free Available (RoHS Compliant)
Applications
? V DDQ , V TT , and VREF regulation for DDRAM memory
systems
- Main Memory in AMD? Athlon? and K8?, Pentium?
III, Pentium IV, Transmeta, PowerPC?, AlphaPC?, and
UltraSparc? based computer systems
- Video memory in graphics systems
? High-power tracking DC-DC regulators
TEMP
PKG.
PART NUMBER
ISL6530CB*
ISL6530CBZ*
(See Note)
ISL6530CR*
ISL6530CRZ*
RANGE( o C)
0 to 70
0 to 70
0 to 70
0 to 70
PACKAGE
24 Lead SOIC
24 Lead SOIC
(Pb-free)
32 Lead 5x5 QFN
32 Lead 5x5 QFN
DWG. #
M24.3
M24.3
L32.5x5
L32.5x5
(See Note)
ISL6530EVAL1, 2
(Pb-free)
Evaluation Board
* Add “-T” suffix for tape and reel option.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright ? Intersil Americas Inc. 2003, 2004. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
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