参数资料
| 型号： | ISL6530CBZ-T |
| 厂商： | Intersil |
| 文件页数： | 9/17页 |
| 文件大小： | 0K |
| 描述： | IC CONTROLLER INTEL 24SOIC |
| 标准包装： | 1 |
| 应用： | 控制器，Intel Pentium? III，IV |
| 输入电压： | 4.5 V ~ 5.5 V |
| 输出数： | 2 |
| 输出电压： | 2.5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC |
| 包装： | 标准包装 |
| 其它名称： | ISL6530CBZ-TDKR |
ISL6530
One method that may be employed to bypass the internal
V TT reference generation is to supply an external reference
directly to the V REF_IN pin. When doing this the SENSE1 pin
must remain unconnected. Caution must be exercised when
using this method as the V TT regulator does not employ a
soft-start of its own.
A second method would be to overdrive the internal
resistors. Figure 4 shows how to implement this method. The
external resistors used to overdrive the internal resistors
should be less than 2k ? and have a tolerance of 1% or
better. This method still supplies a buffer between the
resistor network and any loading on the V REF pin. If there is
no loading on the V REF pin, then no buffering is necessary
and the reference voltage created by the resistor network
can be tied directly to V REF .
programs the overcurrent trip level (see Figure 1). An internal
40 μ A (typical) current sink develops a voltage across R OCSET
that is referenced to V IN . When the voltage across the upper
MOSFET of V DDQ (also referenced to V IN ) exceeds the
voltage across R OCSET , the overcurrent function initiates a
soft-start sequence.
Figure 5 illustrates the protection feature responding to an
over current event on V DDQ . At time T0, an over current
condition is sensed across the upper MOSFET of the V DDQ
regulator. As a result, both regulators are quickly shutdown
and the internal soft-start function begins producing soft-
start ramps. The delay interval seen by the output is
equivalent to three soft-start cycles. The fourth internal soft-
start cycle initiates a normal soft-start ramp of the output, at
time T1. Both outputs are brought back into regulation by
time t2, as long as the overcurrent event has cleared.
V DDQ
R A
SENSE1
VREF_IN
ISL6530
Had the cause of the overcurrent still been present after the
delay interval, the overcurrent condition would be sensed
and both regulators would be shut down again for another
delay interval of three soft-start cycles. The resulting hiccup
mode style of protection would continue to repeat
VREF
+
-
indefinitely.
R B
V DDQ (2.5V)
TO ERROR
AMPLIFIER
V TT (1.25V)
FIGURE 4. V TT REFERENCE OVERDRIVE
Converter Shutdown
Pulling and holding the OCSET/SD pin below 0.8V will
shutdown both regulators. During this state, PGOOD will be
held LOW. Upon release of the OCSET/SD pin, the IC enters
into a soft start cycle which brings both outputs back into
regulation.
Voltage Monitoring
The ISL6530 offers a PGOOD signal that will communicate
whether the regulation of both V DDQ and V TT are within
±15% of regulation, the V2_SD pin is held low and the bias
voltage of the IC is above the POR level. If all the criteria
above are true, the PGOOD pin will be at a high impedence
0V
INTERNAL SOFT-START FUNCTION
DELAY INTERVAL
level. When one or more of the criteria listed above are false,
the PGOOD pin will be held low.
T0
TIME
T1
T2
FIGURE 5. OVERCURRENT PROTECTION RESPONSE
Overcurrent Protection
r DS ( ON )
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET on-resistance, r DS(ON) , of
V DDQ to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R OCSET )
9
The overcurrent function will trip at a peak inductor current
(I PEAK) determined by:
I OCSET x R OCSET
I PEAK = -----------------------------------------------------
where I OCSET is the internal OCSET current source (40 μ A
typical). The OC trip point varies mainly due to the MOSFET
FN9052.2
November 15, 2004
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