参数资料
| 型号： | ISL6530CBZ-T |
| 厂商： | Intersil |
| 文件页数： | 8/17页 |
| 文件大小： | 0K |
| 描述： | IC CONTROLLER INTEL 24SOIC |
| 标准包装： | 1 |
| 应用： | 控制器，Intel Pentium? III，IV |
| 输入电压： | 4.5 V ~ 5.5 V |
| 输出数： | 2 |
| 输出电压： | 2.5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC |
| 包装： | 标准包装 |
| 其它名称： | ISL6530CBZ-TDKR |
ISL6530
When the V2_SD input of the ISL6530 is driven high, the
V TT regulator is placed into a “sleep” state. In the sleep
(1V/DIV )
VCC (5V)
V DDQ (2.5V)
state the main V TT regulator is disabled, with both the
upper and lower MOSFETs being turned off. The V TT bus
is maintained at close to .5xVdd via a low current window
regulator which drives V TT via the SENSE2 pin.
Maintaining V TT at .5xV DDQ consumes negligible power
and enables rapid wake-up from sleep mode without the
need of softstarting the V TT regulator. During this power
down mode, PGOOD is held LOW.
V TT (1.25V)
0V
Output Voltage Selection
The output voltage of the V DDQ regulator can be
T0
T1
T2
programmed to any level between V IN (i.e. +5V) and the
R1 × 0.8V
TIME
FIGURE 2. SOFT-START INTERVAL
Shoot-Through Protection
A shoot-through condition occurs when both the upper
MOSFET and lower MOSFET are turned on simultaneously,
effectively shorting the input voltage to ground. To protect
the regulators from a shoot-through condition, the ISL6530
incorporates specialized circuitry which insures that
complementary MOSFETs are not ON simultaneously.
The adaptive shoot-through protection utilized by the V DDQ
regulator looks at the lower gate drive pin, LGATE1, and the
phase node, PHASE1, to determine whether a MOSFET is
ON or OFF. If PHASE1 is below 0.8V, the upper gate is
internal reference, 0.8V. An external resistor divider is used
to scale the output voltage relative to the reference voltage
and feed it back to the inverting input of the error amplifier,
see Figure 3. However, since the value of R1 affects the
values of the rest of the compensation components, it is
advisable to keep its value less than 5k ? . R4 can be
calculated based on the following equation:
R4 = --------------------------------------
V OUT1 – 0.8V
If the output voltage desired is 0.8V, simply route VOUT1
back to the FB pin through R1, but do not populate R4.
+5V
defined as being OFF. Similarly, if LGATE1 is below 0.8V, the
lower MOSFET is defined as being OFF. This method of
shoot-through protection allows the V DDQ regulator to
source current only.
VCC
D1
BOOT1
Due to the necessity of sinking current, the V TT regulator
employs a modified protection scheme from that of the
V DDQ regulator. If the voltage from UGATE2 or from
LGATE2 to GND is less than 0.8V, then the respective
MOSFET is defined as being OFF and the other MOSFET is
turned ON.
ISL6530
UGATE1
PHASE1
LGATE1
C4
Q1
Q2
L OUT
+
C OUT1
V DDQ
Since the voltage of the lower MOSFET gates and the upper
FB1
MOSFET gate of the V TT supply are being measured to
determine the state of the MOSFET, the designer is
COMP1
C1
R1
C3
R3
encouraged to consider the repercussions of introducing
external components between the gate drivers and their
respective MOSFET gates before actually implementing
such measures. Doing so may interfere with the shoot-
C2
R2
R4
through protection.
Power Down Mode
DDRAM systems include a sleep state in which the V DDQ
voltage to the memories is maintained, but signaling is
suspended. During this mode the V TT termination voltage is
no longer needed. The only load placed on the V TT bus is
the leakage of the associated signal pins of the DDRAM and
memory controller ICs.
8
FIGURE 3. OUTPUT VOLTAGE SELECTION OF V DDQ
V TT Reference Overdrive
The ISL6530 allows the designer to bypass the internal 50%
tracking of V DDQ that is used as the reference for V TT . The
ISL6530 was designed to divide down the V DDQ voltage by
50% through two internal matched resistances. These
resistances are typically 200k ? .
FN9052.2
November 15, 2004
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