参数资料
型号: ISL6532AIRZ-T
厂商: Intersil
文件页数: 11/17页
文件大小: 0K
描述: IC REG/CTRLR ACPI DUAL DDR 28QFN
标准包装: 4,000
应用: 存储器,DDR/DDR2 稳压器
电流 - 电源: 5.25mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-VQFN 裸露焊盘
供应商设备封装: 28-QFN(6x6)
包装: 带卷 (TR)
ISL6532A
fourth internal soft-start cycle initiates a normal soft-start
ramp of the output, at time T1. The output is brought back
into regulation by time T2 as long as the overcurrent event
has cleared.
V DDQ
V AGP
V TT
500mV/DIV
INTERNAL SOFT-START FUNCTION
DELAY INTERVAL
T0 T1 T2
TIME
FIGURE 3. V DDQ OVERCURRENT PROTECTION AND
V TT /V AGP LDO UNDER VOLTAGE PROTECTION
RESPONSES
Had the cause of the overcurrent still been present after the
delay interval, the overcurrent condition would be sensed
and the regulator would be shut down again for another
delay interval of three soft-start cycles. The resulting hiccup
mode style of protection would continue to repeat indefinitely.
The overcurrent function will trip at a peak inductor current
(I PEAK) determined by:
A small ceramic capacitor should be placed in parallel with
R OCSET to smooth the voltage across R OCSET in the
presence of switching noise on the input voltage.
Overvoltage and Undervoltage Protection
All three regulators are protected from faults through internal
Overvoltage and Undervoltage detection circuitry. If the any
rail falls below 85% of the targeted voltage, then an
undervoltage event is tripped. An undervoltage will disable
all three regulators for a period of 3 soft-start cycles, after
which a normal soft-start is initiated. If the output is still
under 85% of target, the regulators will continue to be
disabled and soft-started in a hiccup mode until the fault is
cleared. This protection feature works much the same as the
VDDQ PWM overcurrent protection works. See Figure 3.
If the any rail exceeds 115% of the targeted voltage, then all
three outputs are immediately disabled. The ISL6532A will
not re-enable the outputs until either the bias voltage is
toggled in order to initiate a POR or the S5 signal is forced
LOW and then back to HIGH.
Thermal Protection (S0/S3 State)
If the ISL6532A IC junction temperature reaches a nominal
temperature of +140°C, all regulators will be disabled. The
ISL6532A will not re-enable the outputs until the junction
temperature drops below +110°C and either the bias voltage
is toggled in order to initiate a POR or the SLP_S5 signal is
forced LOW and then back to HIGH.
Shoot-Through Protection
A shoot-through condition occurs when both the upper and
lower MOSFETs are turned on simultaneously, effectively
shorting the input voltage to ground. To protect from a shoot-
through condition, the ISL6532A incorporates specialized
circuitry, which insures that complementary MOSFETs are
not ON simultaneously.
r DS ( ON )
I OCSET x R OCSET
I PEAK = -----------------------------------------------------
(EQ. 3)
The adaptive shoot-through protection utilized by the V DDQ
regulator looks at the lower gate drive pin, LGATE, and the
upper gate drive pin, UGATE, to determine whether a
I PEAK > I OUT ( MAX ) + ---------- ,where Δ I is
where I OCSET is the internal OCSET current source (20 μ A
typical). The OC trip point varies mainly due to the MOSFET
r DS(ON) variations. To avoid overcurrent tripping in the
normal operating load range, find the R OCSET resistor from
Equation 3 with:
1. The maximum r DS(ON) at the highest junction
temperature.
2. The minimum I OCSET from the specification table.
3. Determine I PEAK for:
( Δ I )
2
the output inductor ripple current.
For an equation for the ripple current, see the section under
component guidelines titled “Output Inductor Selection” on
11
MOSFET is ON or OFF. If the voltage from UGATE or from
LGATE to GND is less than 0.8V, then the respective
MOSFET is defined as being OFF and the other MOSFET is
allowed to turned ON. This method allows the V DDQ
regulator to both source and sink current.
Since the voltage of the MOSFET gates are being measured
to determine the state of the MOSFET, the designer is
encouraged to consider the repercussions of introducing
external components between the gate drivers and their
respective MOSFET gates before actually implementing
such measures. Doing so may interfere with the shoot-
through protection.
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