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| 型号： | ISL6532AIRZ-T |
| 厂商： | Intersil |
| 文件页数： | 12/17页 |
| 文件大小： | 0K |
| 描述： | IC REG/CTRLR ACPI DUAL DDR 28QFN |
| 标准包装： | 4,000 |
| 应用： | 存储器，DDR/DDR2 稳压器 |
| 电流 - 电源： | 5.25mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-VQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN（6x6） |
| 包装： | 带卷 (TR) |
ISL6532A
Application Guidelines
12V ATX
Layout Considerations
Layout is very important in high frequency switching
converter design. With power devices switching efficiently at
P12V
GNDP
ISL6532A
NCH
C BP
V IN_DDR
250kHz, the resulting current transitions from one device to
another cause voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit,
and lead to device overvoltage stress. Careful component
layout and printed circuit board design minimizes these
voltage spikes.
P5VSBY
5VSBY
GNDP
UGATE
C BP
5VSBY
C IN
Q 1 L OUT
V DDQ
PHASE
As an example, consider the turn-off transition of the control
MOSFET. Prior to turn-off, the MOSFET is carrying the full
load current. During turn-off, current stops flowing in the
MOSFET and is picked up by the lower MOSFET. Any
parasitic inductance in the switched current path generates a
large voltage spike during the switching interval. Careful
LGATE
COMP
FB
C 2
R 2
C 1
Q 2
R 1
C OUT1
component selection, tight layout of the critical components,
and short, wide traces minimizes the magnitude of voltage
spikes.
There are two sets of critical components in the ISL6532A
switching converter. The switching components are the most
critical because they switch large amounts of energy, and
therefore tend to generate large amounts of noise. Next are
the small signal components which connect to sensitive
VDDQ(3)
VTT(2)
C OUT2
R 4
C 3 R 3
V DDQ
V TT
V IN_AGP
nodes or supply critical bypass current and signal coupling.
A multi-layer printed circuit board is recommended. Figure 4
shows the connections of the critical components in the
converter. Note that capacitors C IN and C OUT could each
represent numerous physical capacitors. Dedicate one solid
layer, usually a middle layer of the PC board, for a ground
plane and make all critical component ground connections
Q 3
DRIVE2
R 5
FB2
GND PAD
R 6
C OUT3
KEY
ISLAND ON POWER PLANE LAYER
V AGP
with vias to this layer. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the
PHASE terminals to the output inductor short. The power
plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes. Use the remaining printed
circuit layers for small signal wiring. The wiring traces from
the GATE pins to the MOSFET gates should be kept short
and wide enough to easily handle the 1A of drive current.
In order to dissipate heat generated by the internal V TT
LDO, the ground pad, pin 29, should be connected to the
internal ground plane through at least four vias. This allows
the heat to move away from the IC and also ties the pad to
the ground plane through a low impedance path.
The switching components should be placed close to the
ISL6532A first. Minimize the length of the connections between
the input capacitors, C IN , and the power switches by placing
them nearby. Position both the ceramic and bulk input
capacitors as close to the upper MOSFET drain as possible.
12
ISLAND ON CIRCUIT PLANE LAYER
VIA CONNECTION TO GROUND PLANE
FIGURE 4. PRINTED CIRCUIT BOARD POWER PLANES
AND ISLANDS
Position the output inductor and output capacitors between the
upper and lower MOSFETs and the load.
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Place the PWM converter compensation
components close to the FB and COMP pins. The feedback
resistors should be located as close as possible to the FB pin
with vias tied straight to the ground plane as required.
Feedback Compensation - PWM Buck Converter
Figure 5 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V OUT ) is regulated to the Reference voltage level. The error
amplifier output (V E/A ) is compared with the oscillator (OSC)
triangular wave to provide a pulse-width modulated (PWM)
wave with an amplitude of V IN at the PHASE node.
The PWM wave is smoothed by the output filter (L O and C O ).
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| ISL6532BCR | 功能描述:IC REG/CTRLR ACPI DUAL DDR 20QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| ISL6532BCR-T | 功能描述:IC REG/CTRLR ACPI DUAL DDR 20QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| ISL6532BCRZ | 功能描述:电压模式 PWM 控制器 DL DDRG W/3ALDO FOR SPRINGDALE MBS 20 RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6532BCRZ-T | 功能描述:电压模式 PWM 控制器 DL DDRG W/3ALDO FOR SPRINGDALE MBS 20 RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
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