参数资料
型号: ISL6539IA-T
厂商: Intersil
文件页数: 19/20页
文件大小: 0K
描述: IC CTRLR DDR DRAM, SDRAM 28QSOP
标准包装: 2,500
应用: 控制器,DDR DRAM,SDRAM
输入电压: 3.3 V ~ 18 V
输出数: 2
输出电压: 0.9 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
供应商设备封装: 28-SSOP/QSOP
包装: 带卷 (TR)
ISL6539
Pin 14, VIN
This pin connects to battery voltage, and is less noise
sensitive.
Copper Size for the Phase Node
Big coppers on both sides of the Phase node introduce
parasitic capacitance. The capacitance of PHASE should be
kept very low to minimize ringing. If ringing is excessive, it
could easily affect current sample information. It would be
best to limit the size of the PHASE node copper in strict
accordance with the current and thermal management of the
application.
Decoupling Capacitor for Switching MOSFET
It is recommended that ceramic caps be used closely
connected to the drain side of the upper MOSFET, and the
source of the lower MOSFET. This capacitor reduces the
noise and the power loss of the MOSFET. Refer to Figure 13
for the power component placement.
INPUT
CAP
1
Identify the Power and Signal Ground
The input and output capacitors of the converters, the source
terminals of the bottom switching MOSFET PGND1, and
OUTPUT
CAP
2
3
4
SI4816DY
PGND2, should be closely connected to the power ground.
The other components should connect to signal ground.
Signal and power ground are tied together at the negative
terminal of the output capacitors.
19
INDUCTOR
FIGURE 13. A GOOD EXAMPLE OF POWER COMPONENT
REPLACEMENT. THIS SHOWS THAT THE
NEGATIVE OF THE INPUT AND OUTPUT CAP
AND THE SOURCE OF THE MOSFET ARE TIED
AT ONE POINT.
FN9144.6
April 29, 2010
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