参数资料
型号: ISL6556BCB-T
厂商: Intersil
文件页数: 14/24页
文件大小: 0K
描述: IC CTRLR MULTIPHASE VRM10 28SOIC
标准包装: 1,000
应用: 控制器,Intel VR10X
输入电压: 3 V ~ 12 V
输出数: 4
输出电压: 0.84 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
ISL6556B
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
VDIFF
DYNAMIC
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
As shown in Figure 5, a current proportional to the average
current in all active channels, I AVG , flows from FB through a
load-line regulation resistor, R FB . The resulting voltage drop
across R FB is proportional to the output current, effectively
creating an output voltage droop with a steady-state value
defined as
R FB
FB
VCC
OR
GND
VID D/A
E/A
V DROOP = I AVG R FB
(EQ. 5)
R OFS
-
2.0V
In most cases, each channel uses the same R ISEN value to
sense current. A more complete expression for V DROOP is
OFS
ISL6556BCB
+
-
0.5V
+
derived by combining equations 4 and 5.
GND
VCC
V DROOP = ------------- ---------------------- R FB
R ISEN
I OUT r DS ( ON )
N
(EQ. 6)
FIGURE 6. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556BCB (28-LEAD SOIC)
Output-Voltage Offset Programming
The ISL6556B allows the designer to accurately adjust the
offset voltage. When a resistor, R OFS , is connected between
OFS and VCC, the voltage across it is regulated to 2.0V. This
VDIFF
causes a proportional current (I OFS ) to flow into OFS. If R OFS
is connected to ground, the voltage across it is regulated to
0.5V, and I OFS flows out of OFS. The offset current flowing
R FB
DYNAMIC
VID D/A
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (I OFS x
R FB ). These functions are shown in Figures 6 and 7.
As evident in Figure 7, the OFSOUT pin must be connected
to the FB pin for this current injection to function in
ISL6556BCR. The current flow through R FB creates an offset
at the REF pin, which is ultimately duplicated at the output of
the regulator.
Once the desired output offset voltage has been determined,
FB
OFSOUT
VCC
OR
GND
E/A
use the following formulas to set R OFS :
For Positive Offset (connect R OFS to GND):
R OFS
+
-
+
2.0V
0.5 × R FB
R OFS = --------------------------
V OFFSET
(EQ. 7)
OFS
ISL6556BCR
-
GND
0.5V
VCC
For Negative Offset (connect R OFS to VCC):
FIGURE 7. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556BCR (32-LEAD QFN)
2 × R FB
R OFS = --------------------------
V OFFSET
14
(EQ. 8)
Dynamic VID
Modern microprocessors need to make changes to their core
voltage as part of normal operation. They direct the core-
voltage regulator to do this by making changes to the VID
inputs during regulator operation. The power management
solution is required to monitor the DAC inputs and respond to
FN9097.4
December 28, 2004
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