参数资料
型号: ISL6556BCB-T
厂商: Intersil
文件页数: 22/24页
文件大小: 0K
描述: IC CTRLR MULTIPHASE VRM10 28SOIC
标准包装: 1,000
应用: 控制器,Intel VR10X
输入电压: 3 V ~ 12 V
输出数: 4
输出电压: 0.84 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
ISL6556B
0.3
I L,PP = 0
I L,PP = 0.25 I O
I L,PP = 0.5 I O
I L,PP = 0.75 I O
Layout Considerations
The following layout strategies are intended to minimize the
impact of board parasitic impedances on converter
performance and to optimize the heat-dissipating capabilities
0.2
0.1
of the printed-circuit board. These sections highlight some
important practices which should not be overlooked during the
layout process.
Component Placement
Within the allotted implementation area, orient the switching
components first. The switching components are the most
critical because they carry large amounts of energy and tend
to generate high levels of noise. Switching component
0
0
0.2
0.4
0.6
0.8
1.0
placement should take into account power dissipation. Align
the output inductors and MOSFETs such that space
DUTY CYCLE (V O /V IN )
FIGURE 16. NORMALIZED INPUT-CAPACITOR RMS CURRENT
vs DUTY CYCLE FOR 4-PHASE CONVERTER
MULTI-PHASE RMS IMPROVEMENT
Figure 17 is provided as a reference to demonstrate the
dramatic reductions in input-capacitor RMS current upon the
implementation of the multi-phase topology. For example,
compare the input rms current requirements of a two-phase
converter versus that of a single phase. Assume both
converters have a duty cycle of 0.25, maximum sustained
output current of 40A, and a ratio of I C,PP to I O of 0.5. The
single phase converter would require 17.3 Arms current
capacity while the two-phase converter would only require
10.9 Arms. The advantages become even more pronounced
when output current is increased and additional phases are
added to keep the component cost down relative to the
single phase approach.
0.6
0.4
between the components is minimized while creating the
PHASE plane. Place the Intersil MOSFET driver IC as close
as possible to the MOSFETs they control to reduce the
parasitic impedances due to trace length between critical
driver input and output signals. If possible, duplicate the
same placement of these components for each phase.
Next, place the input and output capacitors. Position one
high-frequency ceramic input capacitor next to each upper
MOSFET drain. Place the bulk input capacitors as close to
the upper MOSFET drains as dictated by the component
size and dimensions. Long distances between input
capacitors and MOSFET drains result in too much trace
inductance and a reduction in capacitor performance. Locate
the output capacitors between the inductors and the load,
while keeping them in close proximity to the microprocessor
socket.
The ISL6556A can be placed off to one side or centered
relative to the individual phase switching components.
Routing of sense lines and PWM signals will guide final
placement. Critical small signal components to place close
to the controller include the ISEN resistors, R T resistor,
feedback resistor, and compensation components.
Bypass capacitors for the ISL6556A and HIP660X driver
bias supplies must be placed next to their respective pins.
Trace parasitic impedances will reduce their effectiveness.
Plane Allocation and Routing
0.2
I L,PP = 0
I L,PP = 0.5 I O
I L,PP = 0.75 I O
Dedicate one solid layer, usually a middle layer, for a ground
plane. Make all critical component ground connections with
vias to this plane. Dedicate one additional layer for power
planes; breaking the plane up into smaller islands of
common voltage. Use the remaining layers for signal wiring.
0
0
0.2
0.4 0.6
DUTY CYCLE (V O /V IN )
0.8
1.0
Route phase planes of copper filled polygons on the top and
bottom once the switching component placement is set. Size
the trace width between the driver gate pins and the
FIGURE 17. NORMALIZED INPUT-CAPACITOR RMS CURRENT
vs DUTY CYCLE FOR SINGLE-PHASE
CONVERTER
22
MOSFET gates to carry 1A of current. When routing
components in the switching path, use short wide traces to
reduce the associated parasitic impedances.
FN9097.4
December 28, 2004
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