参数资料
型号: ISL6559CB
厂商: Intersil
文件页数: 9/21页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 28-SOIC
标准包装: 26
PWM 型: 电压模式
输出数: 1
频率 - 最大: 4MHz
占空比: 75%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
包装: 管件
ISL6559
Most multi-phase controllers simply have the output voltage
fed back to the inverting input of the error amplifier through a
resistor. The ISL6559 features an internal differential
remote-sense amplifier in the feedback path. The amplifier
removes the voltage error encountered when measuring the
output voltage relative to the local controller ground
reference point, resulting in a more accurate means of
feeds out the OFS pin into a user selected external resistor
to ground. The resulting voltage across the resistor, V OFS , is
internally divided down by ten to create the offset voltage.
This method of offsetting the DAC voltage is more accurate
than external methods of level-shifting the FB pin.
TABLE 1. VOLTAGE IDENTIFICATION CODES
sensing output voltage. Connect the microprocessor sense
pins to the non-inverting input, VSEN, and inverting input,
RGND, of the remote-sense amplifier. The remote-sense
amplifier output, V DIFF , is then tied through an external
resistor to the inverting input of the error amplifier.
A digital to analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID4
through VID0. The DAC decodes the a 5-bit logic signal
(VID) into one of the discrete voltages shown in Table 1.
Each VID input offers a 20 μ A pull-up to an internal 2.5V
source for use with open-drain outputs. External pull-up
resistors or active-high output stages can augment the pull-
up current sources, but a slight accuracy error can occur if
they are pulled above 2.9V. The DAC-selected reference
voltage is connected to the non-inverting input of the error
amplifier.
The ISL6559 features a second non-inverting input to the
error amplifier which allows the user to directly offset the
DAC reference voltage in the positive direction only. The
offset voltage is created by an internal current source which
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
VID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
VID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
DAC
1.550
1.525
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225
1.200
1.175
1.150
C C
R C
EXTERNAL CIRCUIT
COMP
FB
ISL6559 INTERNAL CIRCUIT
ERROR AMPLIFIER
-
1
1
1
1
0
0
0
0
0
0
0
1
0
1
1
0
1
0
1
0
1.125
1.100
1.075
1.050
+
IOUT
I AVG
+
+
V COMP
1
0
1
0
1
1.025
R FB
V DROOP
1
0
1
1
0
1.000
-
VDIFF
REFERENCE
VOLTAGE
1
1
1
0
1
1
1
0
0
1
0
0
1
0
1
0.975
0.950
0.925
REMOTE
SENSE
POINTS
V OUT
GND
VSEN
RGND
+
-
1
1
1
1
1
1
0
0
1
1
1
0
0
1
0
0.900
0.875
0.850
DIFFERENTIAL
1
1
1
0
1
0.825
REMOTE-SENSE
AMPLIFIER
1
1
1
1
0
0.800
R OFS
+
V OFS
-
OFS
1/10
100 μ A
OFFSET
VOLTAGE
1 1 1 1 1 Shutdown
The integrating compensation network shown in Figure 5
assures that the steady-state error in the output voltage is
limited to the error in the reference voltage (output of the
DAC) plus offset errors in the OFS current source, remote-
FIGURE 5. OUTPUT-VOLTAGE AND LOAD-LINE
REGULATION
9
sense and error amplifiers. Intersil specifies the guaranteed
tolerance of the ISL6559 to include all variations in current
FN9084.8
December 29, 2004
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