参数资料
| 型号： | ISL6563CR-T |
| 厂商： | Intersil |
| 文件页数： | 9/19页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM MULTIPHASE 24-QFN |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 1.85 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN（4x4） |
| 包装： | 带卷 (TR) |
ISL6563
The ISL6563 accommodates three different DAC ranges:
PWM OPERATION
One switching cycle for the ISL6563 is defined as the time
between consecutive PWM pulse terminations (turn-off of
the upper MOSFET on a channel). Each cycle begins when
a switching clock signal commands the upper MOSFET to
go off. The other channel’s upper MOSFET conduction is
terminated 1/2 of a cycle later.
Once a channel’s upper MOSFET is turned off, the lower
MOSFET remains on for a minimum of 1/3 cycle. This forced
off time is required to assure an accurate current sample.
Following the 1/3-cycle forced off time, the controller enables
the upper MOSFET output. Once enabled, the upper
MOSFET output transitions high when the sawtooth signal
crosses the adjusted error-amplifier output signal, as
illustrated in the ISL6563’s block diagram. Just prior to the
upper drive turning the MOSFET on, the lower MOSFET
drive turns the freewheeling element off. The upper
MOSFET is kept on until the clock signals the beginning of
the next switching cycle and the PWM pulse is terminated.
CURRENT SENSING
ISL6563 senses current by sampling the voltage across the
lower MOSFET during its conduction interval. MOSFET
r DS(ON) sensing is a no-added-cost method to sense current
for load line regulation, channel current balance, module
current sharing, and overcurrent protection.
The PHASE pins are used as inputs for each channel.
Internal circuitry samples the lower MOSFETs’ r DS(ON)
voltage, once each cycle, during their conduction periods
and time multiplexes the sampled voltages across the ISEN
resistor. The current that is thus developed through the ISEN
resistor is duplicated and fed back through the FB pin to
create droop, as well as used for channel current balancing.
CHANNEL-CURRENT BALANCE
Another benefit of multiphase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this, the
designer avoids the complexity of driving multiple parallel
MOSFETs and the expense of using expensive heat sinks
and exotic magnetic materials.
In order to fully realize the thermal advantage, it is important
that each channel in a multiphase converter be controlled to
deliver about the same current at any load level. Intersil
multiphase controllers ensure current balance by comparing
each channel’s current to the average current delivered by
all channels and making appropriate adjustments to each
channel’s pulse width based on the error. The error signal
current. If both channels’ currents exceed, at any time, the
reference current, the overcurrent comparator triggers an
overcurrent event. Similarly, an OC event is also triggered if
either channel’s current exceeds the 95μA reference for 7
consecutive switching cycles.
As a result of an OC event, output drives on both channels
turn off both upper and lower MOSFETs. The system then
waits in this state for a period of 4096 switching clock cycles.
The wait period is followed by a soft-start attempt . If the soft-
start attempt is successful, operation continues as normal.
Should the soft-start attempt fail, the ISL6563 repeats the
2048-cycle wait period and follows with another soft-start
attempt. This hiccup mode of operation continues indefinitely
(as depicted in Figure 4) for as long as the controller is
enabled or until the overcurrent condition is removed.
OUTPUT CURRENT
OUTPUT VOLTAGE
FIGURE 4. OVERCURRENT BEHAVIOR IN HICCUP MODE
OUTPUT VOLTAGE SETTING
The ISL6563 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at the
VID pins. The DAC decodes the 5 or 6-bit logic signals into one
of the discrete voltages shown in Tables 1 through 3. Each VID
pin is pulled up to an internal 1.2V voltage by weak current
sources (about 45μA current, decreasing to 0 as the voltage at
the VID pins varies from 0 to the internal 1.2V pull-up voltage).
External pull-up resistors or active-high output stages can
augment the pull-up current sources, up to a voltage of 5V.
.
Intel VRM9.0, AMD Hammer, or Intel VRM10.0 - see
connections for DAC range compatibility.
TABLE 1. AMD HAMMER VOLTAGE IDENTIFICATION
CODES
modifies the pulse width to correct any unbalance and force
the error toward zero.
OVERCURRENT PROTECTION
The individual channel currents, as sensed via the PHASE
pins and scaled via the ISEN resistor, are continuously
monitored and compared with an internal 95μA reference
VID4
1
1
1
1
VID3
1
1
1
1
VID2
1
1
1
1
VID1
1
1
0
0
VID0
1
0
1
0
VDAC
Off
0.800
0.825
0.850
9
FN9126.8
June 10, 2010
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6563CR-TK | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6563CRZ | 功能描述:电流型 PWM 控制器 P6 TWO PHS CONT INTEGRTD DRVRS DESKT RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6563CRZ-T | 功能描述:电流型 PWM 控制器 P6 TWO PHS CONT INTEGRTD DRVRS DESKT RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6563CRZ-TK | 功能描述:IC CTRLR PWM MULTIPHASE 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6563EVAL1 | 制造商:Intersil Corporation 功能描述:DEV TOOLS, EVAL BD - Bulk 制造商:Intersil 功能描述:ISL6563 EVALRD |
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