参数资料
| 型号： | ISL6569ACR-T |
| 厂商： | Intersil |
| 文件页数： | 16/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 32-QFN |
| 标准包装： | 6,000 |
| PWM 型： | 电流/电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 2MHz |
| 占空比： | 75% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
ISL6569A
current (see Equation 1); d is the duty cycle (V OUT /V IN ); and
L is the per-channel inductance.
through the upper MOSFET across VIN. The power
dissipated as a result is P UP,3 and is approximately
? I M ? 2 I L , PP ( 1 – d )
P L = r DS ( ON ) ? ------ ? ( 1 – d ) + --------------------------------
? 2 ?
12
(EQ. 13)
P UP , 3 ≈ V IN Q rr f S
(EQ. 17)
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
Finally, the resistive part of the upper MOSFET’s dissipation
is given in Equation 18 as P UP,4 .
I PP2
? I M ?
P UP , 4 = r DS ( ON ) ? ------ ? d + ----------
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I M , V D(ON) ; the switching frequency,
? 2 ? 12
2
(EQ. 18)
f S ; and the length of dead times, t d1 and t d2 , at the
beginning and the end of the lower-MOSFET conduction
interval respectively.
In this case, of course, r DS(ON) is the on resistance of the
upper MOSFET.
The total power dissipated by the upper MOSFET at full load
I PP ?
? I
P D = V D ( ON ) f S ? ------ + --------- ? t
? d1 + ? ? ------ – --------- ? ? d2
I M I PP M
? 2
2 2 2
t
(EQ. 14)
can now be approximated as the summation of the results
from Equations 15, 16, 17 and 18. Since the power
equations depend on MOSFET parameters, choosing the
Thus the total maximum power dissipated in each lower
MOSFET is approximated by the summation of P L and P D .
UPPER MOSFET POWER CALCULATION
In addition to r DS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (V IN ) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q rr ; and the upper MOSFET r DS(ON)
correct MOSFETs can be an iterative process that involves
repetitively solving the loss equations for different MOSFETs
and different switching frequencies until converging upon the
best solution.
Current Sensing
The ISEN pins are denoted ISEN1 and ISEN2. The resistors
connected between these pins and their respective phase
nodes determine the gain in the load-line regulation loop and
the channel-current balance loop. Select the values for these
resistors based on the room temperature r DS(ON) of the
lower MOSFETs; the full-load operating current, I FL ;
according to Equation 19 (see also Figure 4).
R ISEN = ----------------------- )
I FL
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
r DS ( ON
50 × 10 – 6
--------
2
(EQ. 19)
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 15,
the required time for this commutation is t 1 and the
approximated associated power loss is P UP,1 .
In certain circumstances, it may be necessary to adjust the
value of one or both of the ISEN resistors. This can arise
when the components of one channel are inhibited from
dissipating their heat so that the affected channel runs hotter
than desired (see the section entitled Channel-Current
Balance ). In this case, chose a new, smaller value of R ISEN
P UP , 1 ≈ V IN ? ------ + --------- ? ? ---- 1 ? f S
? 2 2 ? ? 2 ?
I M I PP ? t ?
(EQ. 15)
for the affected phase. Choose R ISEN,2 in proportion to the
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
R ISEN , 2 = R ISEN ---------- 2
The upper MOSFET begins to conduct and this transition
occurs over a time t 2 . In Equation 16, the approximate power
? T
? T 1
(EQ. 20)
P UP , 2 ≈ V IN ? ------ – --------- ? ? ---- 2 ? f S
loss is P UP,2 .
? I M I PP ? ? t ?
? 2 2 ? ? 2 ?
(EQ. 16)
In Equation 20, make sure that ? T 2 is the desired temperature
rise above the ambient temperature, and ? T 1 is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 20 is usually
A third component involves the lower MOSFET’s reverse-
recovery charge, Q rr . Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Q rr , it is conducted
16
sufficient, it may occasionally be necessary to adjust R ISEN
two or more times to achieve perfect thermal balance between
both channels.
FN9092.2
December 29, 2004
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相关代理商/技术参数 |
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| ISL6569ACRZ | 功能描述:IC REG CTRLR BUCK PWM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6569ACRZ-T | 功能描述:IC REG CTRLR BUCK PWM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6569CB | 功能描述:IC REG CTRLR DIVIDER PWM 24-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6569CB-T | 功能描述:IC REG CTRLR DIVIDER PWM 24-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6569CBZ | 功能描述:IC REG CTRLR DIVIDER PWM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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