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| 型号： | ISL78010ANZ-T |
| 厂商： | Intersil |
| 文件页数： | 12/19页 |
| 文件大小： | 0K |
| 描述： | IC REG MULTI-OUTP 32-TQFP |
| 标准包装： | 2,000 |
| 应用： | LCD 显示器，车用 |
| 电流 - 电源： | 1.7mA |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-TQFP |
| 供应商设备封装： | 32-TQFP（5x5） |
| 包装： | 带卷 (TR) |
ISL78010
Larger values of R INT (R 7 ) may be possible if maximum
A VDD load currents less than the current limit are used. To
ensure A VDD stability, the IC should be operated at the
maximum desired current and then the transient load
response of A VDD should be used to determine the
maximum value of R INT .
Operation of the DELB Output Function
An open drain DELB output is provided to allow the boost
V IN
ISL78010
LX
FB
V BOOST
(Q 4 ) to a time after the V BOOST supply and negative V OFF
charge pump supply have achieved regulation during the
start-up sequence shown in Figures 14 and 16. This then
allows the A VDD and V ON supplies to start-up from 0V
instead of the normal offset voltage of V IN -V DIODE (D 1 ) if Q 4
were not present.
When DELB is activated by the start-up sequencer, it sinks
50μA, allowing a controlled turn-on of Q 4 and charge-up of
C 9 . C 16 can be used to control the turn-on time of Q 4 to
reduce in-rush current into C 9 . The potential divider formed
by R 9 and R 8 can be used to limit the V GS voltage of Q 4 if
required by the voltage rating of this device. When the
voltage at DELB falls to less than 0.6V, the sink current is
increased to ~1.2mA to firmly pull DELB to 0V.
The voltage at DELB is monitored by the fault protection
circuit so that if the initial 50μA sink current fails to pull DELB
below ~0.6V after the start-up sequencing has completed,
then a fault condition will be detected and a fault time-out
ramp will be initiated on the C DEL capacitor (C 7 ).
Operation of the PG Output Function
The PG output consists of an internal pull-up PMOS device to
V IN , to turn off the external Q 1 protection switch, and a
current-limited pull-down NMOS device which sinks ~15μA,
allowing a controlled turn-on of Q 1 gate capacitance. C O is
used to control how fast Q 1 turns on and limiting inrush
current into C 1 . When the voltage at the PG pin falls to less
than 0.6V, the PG sink current is increased to ~1.2mA to firmly
pull the pin to 0V.
The voltage at PG is monitored by the fault protection circuit
so that if the initial 15μA sink current fails to pull PG below
~0.6V after the start-up sequencing has completed, then a
fault condition will be detected, and a fault time-out ramp will
be initiated on the C DEL capacitor (C 7 ).
Cascaded MOSFET Application
A 20V N-Channel MOSFET is integrated in the boost
regulator. For applications where the output voltage is
greater than 20V, an external cascaded MOSFET is needed
as shown in Figure 22. The voltage rating of the external
MOSFET should be greater than V BOOST .
12
FIGURE 22. CASCADED MOSFET TOPOLOGY FOR HIGH
OUTPUT VOLTAGE APPLICATIONS
Linear-Regulator Controllers (V ON , V LOGIC , and
V OFF )
The ISL78010 includes three independent linear-regulator
controllers, in which two are positive output voltage (V ON
and V LOGIC ) and one is negative. The V ON , V OFF , and
V LOGIC linear-regulator controller functional diagrams are
shown in Figures 23, 24, and 25, respectively.
Calculation of the Linear Regulator Base-Emitter
Resistors (R BL , R BP and R BN )
For the pass transistor of the linear regulator, low frequency
gain (h FE ) and unity gain frequency (f T ) are usually specified
in the datasheet. The pass transistor adds a pole to the loop
transfer function at f p = f T /h FE . Therefore, in order to
maintain phase margin at low frequency, the best choice for
a pass device is often a high-frequency, low-gain switching
transistor. Further improvement can be obtained by adding a
base-emitter resistor R BE (R BP , R BL , R BN in the Functional
Block Diagrams on page 13), which increase the pole
frequency to f p = f T *(1+ h FE *re/R BE )/h FE , where
re = KT/qIc. Choose the lowest value R BE in the design as
long as there is still enough base current (I B ) to support the
maximum output current (I C ).
For example, if in the V LOGIC linear regulator, a Fairchild
FMMT549 PNP transistor is used as the external pass
transistor (Q 5 in the application diagram), then for a
maximum V LOGIC operating requirement of 500mA, the data
sheet indicates h FE (min) = 100.
The base-emitter saturation voltage is Vbe_max = 1.25V.
Note that this is normally Vbe ~ 0.7V; however, for the Q 5
transistor, an internal Darlington arrangement is used to
increase its current gain, giving a “base-emitter” voltage of
2 x V BE .
Note also that using a high current Darlington PNP transistor
for Q 5 requires that V IN > V LOGIC + 2V. Should a lower input
voltage be required, then an ordinary high-gain PNP
transistor should be selected for Q 5 to allow a lower
collector-emitter saturation voltage.
FN6501.2
December 4, 2013
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL78010EVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL78010 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL78020 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Automotive Grade TFT-LCD DC/DC with Integrated Amplifiers |
| ISL78020ANZ | 制造商:Intersil Corporation 功能描述:CONV DC-DC SGL-OUT STEP UP 32TQFP - Trays 制造商:Intersil 功能描述:AUTO GRD TFT-LCD DC- DC W/INTEGRTD AMP |
| ISL78020ANZ-T | 制造商:Intersil Corporation 功能描述:CONV DC-DC SGL-OUT STEP UP 32TQFP - Tape and Reel 制造商:Intersil 功能描述:AUTO GRD TFT-LCD DC- DC W/INTEGRTD AMP |
| ISL78022 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Automotive Grade TFT-LCD DC/DC with Integrated Amplifiers |
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