参数资料
| 型号： | ISL78211ARZ |
| 厂商： | Intersil |
| 文件页数： | 16/35页 |
| 文件大小： | 0K |
| 描述： | IC REG 1PHASE BUCK 40QFN |
| 标准包装： | 50 |
| 应用： | 转换器，Intel IMVP-6 |
| 输入电压： | 5 V ~ 21 V |
| 输出数： | 1 |
| 输出电压： | 0.3 V ~ 1.5 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（6x6） |
| 包装： | 管件 |
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ISL78211
R OCSET =
Protection
The ISL78211 provides overcurrent (OC), overvoltage (OV),
undervoltage (UV) and over-temperature (OT) protections as
shown in Table 3.
Overcurrent is detected through the droop voltage, which is
level. An overcurrent fault will be declared when the droop
voltage exceeds the overcurrent set point for more than 120μs. A
way-overcurrent fault will be declared in less than 2μs when the
droop voltage exceeds twice the overcurrent set point. In both
cases, the UGATE and LGATE outputs will be tri-stated and
PGOOD will go low.
The overcurrent condition is detected through the droop voltage.
The droop voltage is equal to I core × R droop , where R droop is the
load line slope. A 10μA current source flows out of the OCSET pin
and creates a voltage drop across R OCSET (shown as R 10 in Figure
2). Overcurrent is detected when the droop voltage exceeds the
voltage across R OCSET . Equation 1 gives the selection of R OCSET .
I OC × R droop (EQ. 1)
10 μ A
For example: The desired overcurrent trip level, I oc , is 30A, R droop
is 2.1m Ω , Equation 1 gives R OCSET = 6.3k.
Undervoltage protection is independent of the overcurrent limit. A
UV fault is declared when the output voltage is lower than (VID-
300mV) for more than 1ms. The gate driver outputs will be tri-
stated and PGOOD will go low. Note that a practical core regulator
design usually trips OC before it trips UV.
The ISL78211 has a thermal throttling feature. If the voltage on
the NTC pin goes below the 1.2V over-temperature threshold, the
VR_TT# pin is pulled low indicating the need for thermal
throttling to the system oversight processor. No other action is
taken within the ISL78211.
Component Selection and
Application
Soft-Start and Mode Change Slew Rates
The ISL78211 commands two different output voltage slew rates for
various modes of operation. The slow slew rate reduces the in-rush
current during start-up and the audible noise during the entry and
the exit of Deeper Sleep Mode. The fast slew rate enhances the
system performance by achieving active mode regulation quickly
during the exit of Deeper Sleep Mode. The SOFT current is
bidirectional-charging the SOFT capacitor when the output voltage is
commanded to rise, and discharging the SOFT capacitor when the
output voltage is commanded to fall.
Figure 5 shows the circuitry on the SOFT pin. The SOFT pin, the
non-inverting input of the error amplifier, is connected to ground
through capacitor C SOFT . I SS is an internal current source
connected to the SOFT pin to charge or discharge C SOFT . The
ISL78211 controls the output voltage slew rate by connecting or
disconnecting another internal current source I Z to the SOFT pin,
depending on the state of the system, i.e. Start-up or Active
mode, and the logic state on the DPRSLPVR pin. The “Soft-start
specs of these two current sources.
There are two levels of overvoltage protection and response. An
OV fault is declared when the output voltage exceeds the VID by
I
SS
I
Z
+200mV for more than 1ms. The gate driver outputs will be tri-
stated and PGOOD will go low. The inductor current will decay
through the low-side FET body diode. Toggling of VR_ON or
bringing V DD below 4V will reset the fault latch. A
way-overvoltage (WOV) fault is declared immediately when the
output voltage exceeds 1.7V. The ISL78211 will latch PGOOD low
and turn on the low-side FETs. The low-side FETs will remain on
until the output voltage drops below approximately 0.85V, then
INTERNAL TO
ISL6261A
ERROR
AMPLIFLIER
all the FETs are turned off. If the output voltage again rises above
1.7V, the protection process repeats. This mechanism provides
C
SOFT
V
REF
maximum protection against a shorted high-side FET while
preventing the output from ringing below ground. Toggling
VR_ON cannot reset the WOV protection; recycling VDD will reset
it. The WOV detector is active all the time, even when other faults
are declared, so the processor is still protected against the high-
side FET leakage while the FETs are commanded off.
16
FIGURE 5. SOFT PIN CURRENT SOURCES FOR FAST AND SLOW
SLEW RATES
I SS is 41μA typical and is used during start-up and mode
changes. When connected to the SOFT pin, I Z adds to I SS to get a
larger current, labeled “IGV” on page 6 in the “Electrical
Specification Table”, on the SOFT pin. I GV is typically 200μA with
a minimum of 175μA.
FN7578.1
December 4, 2013
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