参数资料
| 型号： | ISL8102IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 10/27页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32-QFN |
| 标准包装： | 6,000 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1.5MHz |
| 占空比： | 66.6% |
| 电源电压： | 4.75 V ~ 12.6 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页当前第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页
ISL8102
change in state of the PWM signal and turns off the
C IN CURRENT
Q1 D-S CURRENT
Q2 D-S CURRENT
FIGURE 2. CHANNEL INPUT CURRENTS AND INPUT-
CAPACITOR RMS CURRENT FOR 2-PHASE
CONVERTER
can be used to determine the input-capacitor RMS current
based on load current, duty cycle, and the number of
channels. They are provided as aids in determining the
optimal input capacitor solution.
PWM Operation
The timing of each converter leg is set by the number of
active channels. The default channel setting for the ISL8102
is two. One switching cycle is defined as the time between
the internal PWM1 pulse termination signals. The pulse
termination signal is the internally generated clock signal
that triggers the falling edge of PWM1. The cycle time of the
pulse termination signal is the inverse of the switching
frequency set by the resistor between the FS pin and
ground. Each cycle begins when the clock signal commands
PWM1 to go low. The PWM1 transition signals the internal
channel 1 MOSFET driver to turn off the channel 1 upper
MOSFET and turn on the channel 1 synchronous MOSFET.
In the default channel configuration, the PWM2 pulse
synchronous MOSFET and turns on the upper MOSFET.
The PWM signal will remain high until the pulse termination
signal marks the beginning of the next cycle by triggering the
PWM signal low.
Single phase operation can be selected by connecting 2PH
to GND.
Channel Current Balance
One important benefit of multiphase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this the designer
avoids the complexity of driving parallel MOSFETs and the
expense of using expensive heat sinks and exotic magnetic
materials.
In order to realize the thermal advantage, it is important that
each channel in a multiphase converter be controlled to
carry about the same amount of current at any load level. To
achieve this, the currents through each channel must be
sampled every switching cycle. The sampled currents, I n ,
from each active channel are summed together and divided
by the number of active channels. The resulting cycle
average current, I AVG , provides a measure of the total load-
current demand on the converter during each switching
cycle. Channel current balance is achieved by comparing
the sampled current of each channel to the cycle average
current, and making the proper adjustment to each channel
pulse width based on the error. Intersil’s patented current
balance method is illustrated in Figure 3, with error
correction for Channel 1 represented. In the figure, the cycle
average current, I AVG , is compared with the channel 1
sample, I 1 , to create an error signal I ER .
The filtered error signal modifies the pulse width
commanded by V COMP to correct any unbalance and force
I ER toward zero. The same method for error signal
correction is applied to each active channel.
terminates 1/2 of a cycle after the PWM1 pulse.
One switching cycle for the ISL8102 is defined as the time
V COMP
+
-
+
-
PWM1
TO GATE
CONTROL
LOGIC
between consecutive PWM pulse terminations (turn-off of
the upper MOSFET on a Channel). Each cycle begins when
FILTER
f(s)
SAWTOOTH SIGNAL
a switching clock signal commands the upper MOSFET to
go off. The other Channel’s upper MOSFET conduction is
terminated 1/2 of a cycle later.
I ER
+
-
I AVG
÷ N
Σ
I 2
Once a PWM pulse transitions low, it is held low for a
minimum of 1/3 cycle. This forced off time is required to
ensure an accurate current sample. Current sensing is
described in the next section. After the forced off time
expires, the PWM output is enabled. The PWM output state
is driven by the position of the error amplifier output signal,
V COMP , minus the current correction signal relative to the
sawtooth ramp as illustrated in Figure 3. When the modified
V COMP voltage crosses the sawtooth ramp, the PWM output
transitions high. The internal MOSFET driver detects the
10
I 1
NOTE: Channel 2 is optional.
FIGURE 3. CHANNEL 1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
Current Sampling
In order to realize proper current balance, the currents in
each channel must be sampled every switching cycle. This
sampling occurs during the forced off-time, following a PWM
FN9247.1
July 28, 2008
相关PDF资料 |
PDF描述 |
|---|---|
| ISL8103CRZ-T | IC REG CTRLR BUCK PWM VM 40-QFN |
| ISL8104IRZ | IC REG CTRLR BUCK PWM VM 16-QFN |
| ISL8105BIBZ | IC REG CTRLR BUCK PWM VM 8-SOIC |
| ISL8105IBZ | IC REG CTRLR BUCK PWM VM 8-SOIC |
| ISL8106IRZ | IC REG CTRLR BUCK PWM VM 16-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL8103 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers |
| ISL8103CRZ | 功能描述:IC REG CTRLR BUCK PWM VM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL8103CRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL8103EVAL1 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers |
| ISL8103IRZ | 功能描述:IC REG CTRLR BUCK PWM VM 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
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