参数资料
型号: ISL8103IRZ-T
厂商: Intersil
文件页数: 7/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 40-QFN
标准包装: 1
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.5MHz
占空比: 66.6%
电源电压: 4.75 V ~ 12.6 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 40-VFQFN 裸露焊盘
包装: 剪切带 (CT)
产品目录页面: 1244 (CN2011-ZH PDF)
其它名称: ISL8103IRZ-TCT
ISL8103
Timing Diagram
t PDHUGATE
UGATE
LGATE
t FLGATE
t RUGATE
t FUGATE
t RLGATE
t PDHLGATE
Simplified Power System Diagram
+12V IN
+5V IN
Q1
CHANNEL1
Q2
REF0,REF1
ENLL
OVP
2
DAC
Q3
PGOOD
ISL8103
CHANNEL2
Q4
V OUT
Q5
CHANNEL3
Q6
Functional Pin Description
VCC (Pin 6)
Bias supply for the IC’s small-signal circuitry. Connect this
pin to a +5V supply and locally decouple using a quality
1.0μF ceramic capacitor.
PVCC1, PVCC2, PVCC3 (Pins 33, 24, 18)
Power supply pins for the corresponding channel MOSFET
drive. These pins can be connected to any voltage from +5V
to +12V, depending on the desired MOSFET gate drive level.
Note that tying PVCC2 OR PVCC3 to GND has the same
effect as tying 2PH or 3PH to GND for disabling the
corresponding phase
GND (Pin 41)
Bias and reference ground for the IC.
7
ENLL (Pin 37)
This pin is a threshold sensitive (approximately 0.66V) enable
input for the controller. Held low, this pin disables controller
operation. Pulled high, the pin enables the controller for
operation.
FS (Pin 36)
A resistor, placed from FS to ground, will set the switching
frequency. Refer to Equation 40 and Figure 23 for proper
resistor calculation.
3PH and 2PH (Pins 1, 2)
These pins decide how many phases the controller will
operate. Tying both pins to VCC allows for 3-phase operation.
Tying the 3PH pin to GND causes the controller to operate in
2-phase mode, while connecting both 3PH and 2PH GND will
allow for single phase operation.
FN9246.1
July 21, 2008
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