- 您现在的位置：买卖IC网 > Datasheet目录334 > ISL8112EVAL1Z (Intersil)EVALUATION BOARD FOR ISL8112 Datasheet资料下载
参数资料
| 型号： | ISL8112EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 23/27页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL8112 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 0.7 ~ 5.5 V |
| 电流 - 输出： | 200mA |
| 输入电压： | 5.5 ~ 25 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 可调式 |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL8112 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页当前第23页第24页第25页第26页第27页
ISL8112
Example: I LOAD(MAX) = 5A, V IN = 12V, V OUT2 = 5V,
f = 200kHz, 35% ripple current or LIR = 0.35:
Output Capacitor Selection
The output filter capacitor must have low enough equivalent
L = ----------------------------------------------------------------- = 8.3 μ H
5V ( 12V – 5V )
12V ? 200kHz ? 0.35 ? 5A
(EQ. 8)
series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR to
satisfy stability requirements. The output capacitance must
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite cores
are often the best choice. The core must be large enough
not to saturate at the peak inductor current (IPEAK):
also be high enough to absorb the inductor energy while
transitioning from full-load to no-load conditions without
tripping the overvoltage fault latch. In applications where the
output is subject to large load transients, the output
IPEAK = I LOAD ( MAX ) + [ ( LIR ? 2 ) ? I LOAD ( MAX ) ]
(EQ. 9)
capacitor's size depends on how much ESR is needed to
prevent the output from dipping too low under a load transient.
R SER ≤ ----------------------------------
The inductor ripple current also impacts transient response
performance, especially at low V IN - VSEN_ differences. Low
inductor values allow the inductor current to slew faster,
Ignoring the sag due to finite capacitance:
V DIP
I LOAD ( MAX )
(EQ. 14)
( Δ I LOAD ( MAX ) ) ? L ? K ? ------------------- + t OFF ( MIN ) ? ?
2 ? C OUT ? V OUT K ? -------------------------------- ? - t
R ESR ≤ -----------------------------------------------
V P – P
L IR ? I LOAD ( MAX )
replenishing charge removed from the output filter capacitors
by a sudden load step. The peak amplitude of the output
transient (VSAG) is also a function of the maximum duty
factor, which can be calculated from the on-time and
minimum off-time:
2 ? ? V OUT_ ? ?
? ? V IN ? ?
VSAG = ----------------------------------------------------------------------------------------------------------------------------
? V IN – V OUT ?
? V IN ? OFF ( MIN )
(EQ. 10)
where minimum off-time = 0.35μs (max) and K is from
Table 2.
Determining the Current Limit
The minimum current-limit threshold must be great enough
to support the maximum load current when the current limit
is at the minimum tolerance value. The valley of the inductor
current occurs at ILOAD(MAX) minus half of the ripple
current; therefore:
where V DIP is the maximum-tolerable transient voltage drop.
In non-CPU applications, the output capacitor's size depends
on how much ESR is needed to maintain an acceptable level
of output voltage ripple:
(EQ. 15)
where V P-P is the peak-to-peak output voltage ripple. The
actual capacitance value required relates to the physical size
needed to achieve low ESR, as well as to the chemistry of the
capacitor technology. Thus, the capacitor is usually selected
by ESR and voltage rating rather than by capacitance value
(this is true of tantalum, OS-CON, and other electrolytic-type
capacitors).
When using low-capacity filter capacitors such as polymer
types, capacitor size is usually determined by the capacity
required to prevent VSAG and VSOAR from tripping the
undervoltage and overvoltage fault latches during load
transients in ultrasonic mode.
I LIMIT ( LOW ) > I LOAD ( MAX ) – [ ( LIR ? 2 ) ? I LOAD ( MAX ) ]
(EQ. 11)
For low input-to-output voltage differentials ( V IN / V OUT < 2),
additional output capacitance is required to maintain stability
I PEAK ? L
V SOAR = ------------------------------------------------
2 ? C OUT ? V OUT_
where: I LIMIT(LOW) = minimum current-limit threshold
voltage divided by the r DS(ON) of Q2/Q4.
Use the worst-case maximum value for r DS(ON) from the
MOSFET Q2/Q4 data sheet and add some margin for the
rise in r DS(ON) with temperature. A good general rule is to
allow 0.2% additional resistance for each °C of temperature
rise. Examining the 5A circuit example with a maximum
r DS(ON) = 5m Ω at room temperature. At +125°C reveals the
following:
I LIMIT ( LOW ) = ( 25mV ) ? ( ( 5m Ω × 1.2 ) > 5A – ( 0.35 ? 2 ) 5A )
(EQ. 12)
and good efficiency in ultrasonic mode. The amount of
overshoot due to stored inductor energy can be calculated as:
2
(EQ. 16)
where I PEAK is the peak inductor current.
Input Capacitor Selection
The input capacitors must meet the input-ripple-current
(IRMS) requirement imposed by the switching current. The
ISL8112 dual switching regulator operates at different
frequencies. This interleaves the current pulses drawn by
the two switches and reduces the overlap time where they
add together. The input RMS current is much smaller in
4.17A > 4.12A
(EQ. 13)
comparison than with both SMPSs operating in phase. The
input RMS current varies with load and the input voltage.
4.17A is greater than the valley current of 4.12A, so the circuit
can easily deliver the full-rated 5A using the 30mV nominal
current-limit threshold voltage.
23
The maximum input capacitor RMS current for a single
SMPS is given by:
FN6396.1
August 10, 2010
相关PDF资料 |
PDF描述 |
|---|---|
| ISL8206MEVAL1Z | EVAL BOARD 1 FOR ISL8206 |
| ISL83202IPZ | IC FET DRIVER H-BRIDGE 1A 16-DIP |
| ISL83204AIPZ | IC FET DVR 60V/2.5A HF 20-PDIP |
| ISL85001EVAL1Z | EVALUATION BOARD FOR ISL85001 |
| ISL8501EVAL1Z | EVALUATION BOARD FOR ISL8501 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL8112IRZ | 功能描述:IC REG DL BCK/LINEAR SYNC 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 + 切换式 系列:- 标准包装:2,500 系列:- 拓扑:降压（降压）同步（3），线性（LDO）（2） 功能:任何功能 输出数:5 频率 - 开关:300kHz 电压/电流 - 输出 1:控制器 电压/电流 - 输出 2:控制器 电压/电流 - 输出 3:控制器 带 LED 驱动器:无 带监控器:无 带序列发生器:是 电源电压:5.6 V ~ 24 V 工作温度:-40°C ~ 85°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| ISL8112IRZ-T | 功能描述:IC REG DL BCK/LINEAR SYNC 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 + 切换式 系列:- 标准包装:2,500 系列:- 拓扑:降压（降压）同步（3），线性（LDO）（2） 功能:任何功能 输出数:5 频率 - 开关:300kHz 电压/电流 - 输出 1:控制器 电压/电流 - 输出 2:控制器 电压/电流 - 输出 3:控制器 带 LED 驱动器:无 带监控器:无 带序列发生器:是 电源电压:5.6 V ~ 24 V 工作温度:-40°C ~ 85°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| ISL8115 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Voltage Synchronous Buck PWM Controller with Integrated Gate Driver and Current Sharing Capability |
| ISL8115EVAL1Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Voltage Synchronous Buck PWM Controller with Integrated Gate Driver and Current Sharing Capability |
| ISL8115EVAL2Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Voltage Synchronous Buck PWM Controller with Integrated Gate Driver and Current Sharing Capability |
发布紧急采购，3分钟左右您将得到回复。