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| 型号： | ISL8118IRZ |
| 厂商： | Intersil |
| 文件页数： | 14/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 28-QFN |
| 标准包装： | 60 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 2MHz |
| 占空比： | 100% |
| 电源电压： | 2.97 V ~ 22 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-VFQFN 裸露焊盘 |
| 包装： | 管件 |
| 产品目录页面： | 1244 (CN2011-ZH PDF) |
ISL8118
A 1 Ω to 2 Ω resistor is recommended to be in series with the
bootstrap diode when using VCCs above 5.0V to prevent the
bootstrap capacitor from overcharging due to the negative
swing of the trailing edge of the LX node.
Margining Control
When MARGIN is pulled high or low, the positive or negative
margining functionality is respectively enabled. When
MARGIN is left floating, the function is disabled. Upon
positive margining, an internal buffer drives the OFSN pin
from VCC to maintain OFSP at 0.591V. The resistor divider,
Reference Input
The REFIN pin allows the user to bypass the internal 0.591V
reference with an external reference. Asynchronously, if
REFIN is NOT within ~800mV of VCC, the external reference
pin is used as the control reference instead of the internal
0.591V reference. The minimum usable REFIN voltage is
~60mV while the maximum is VCC - 1.8V - V MARG (if
present). The limitation is set by the error amplifier's maximum
common mode input range of VCC - 1.8V for the industrial
temperature ranges.
RMARG and ROFSP, causes the voltage at OFSN to be
increased. Similarly, upon Negative margining, an internal
buffer drives the OFSP pin from VCC to maintain OFSN at
0.591V. The resistor divider, RMARG and ROFSN, causes
REFERENCE
V REF = 0.591V
VCC
ISL8118
STATE
MACHINE
the voltage at OFSP to be increased. In both modes, the
voltage difference between OFSP and OFSN is then sensed
with an instrumentation amplifier and is converted to the
desired margining voltage by a 5:1 ratio. The maximum
designed margining range of the ISL8118 is ±200mV; this
sets the MINIMUM value of ROFSP or ROFSN at
REFIN
REFOUT
800mV
approximately 5.9k for an RMARG of 10k for a MAXIMUM of
1V across RMARG.
MARGINING
BLOCK
V REF_MARG
OTA
The OFS pins are completely independent and can be set to
different margining levels. The maximum usable reference
voltage for the ISL8118 is VCC - 1.8V, and should not be
exceeded when using the margining functionality, i.e,
VREF_MARG < VCC - 1.8V.
FIGURE 5. SIMPLIFIED REFERENCE BUFFER
Internal Reference and System Accuracy
The internal reference is trimmed to 0.591V. The total DC
V MARG_POS = --------------- ? ---------------------
R OFSP
V MARG_NEG = --------------- ? ---------------------
R OFSN
5
5
V REF R MARG
V REF R MARG
(EQ. 3)
(EQ. 4)
system accuracy of the system is within 0.85% over
commercial temperature range, and 1.25% over industrial
temperature range. System accuracy includes error amplifier
offset, OTA error, and bandgap error. Differential remote
sense offset error is not included. As a result, if the
An alternative calculation provides for a desired percentage
change in the output voltage when using the internal 0.591V
reference:
differential remote sense is used, then an extra 3mV of offset
error enters the system. The use of REFIN may add up to
1.8mV of additional offset error.
V PCT_POS = 20 ? ---------------------
V PCT_NEG = 20 ? ---------------------
R MARG
R OFSP
R MARG
R OFSN
(EQ. 5)
(EQ. 6)
Differential Remote Sense Buffer
The differential remote sense buffer is essentially an
instrumentation amplifier with unity gain. The offset is
trimmed to 3mV for high system accuracy. As with any
instrumentation amplifier, typically 6μA are sourced from the
When not used in a design OFSP, OFSN, and MARGIN
should be left floating. To prevent damage to the part, OFSP
and OFSN should not be tied to VCC or PVCC.
Reference Output Buffer
The internal buffer ’s output tracks the unmargined system
reference. It has a 19mA drive capability, with maximum and
minimum output voltage capabilities of VCC and GND
respectively. Its capacitive loading can range from 1μF to
above 17.6μF, which is designed for 1 to 8 DIMM systems in
DDR (Dual Data Rate) applications. 1μF of capacitance
should always be present on REFOUT. It is not designed to
drive a resistive load and any such load added to the system
should be kept above 300k Ω total impedance.
14
VSENSN pin. The output of the remote sense buffer is
connected directly to the internal OV/UV comparator. As a
result, a resistor divider should be placed on the input of the
buffer for proper regulation, as shown in Figure 6. The
VDIFF pin should be connected to the FB pin by a standard
feed-back network. A small capacitor, C SEN in Figure 6, can
be added to filter out noise, typically C SEN is chosen so the
corresponding time constant does not reduce the overall
phase margin of the design, typically this is 2x to 10x
switching frequency of the regulator.
As some applications will not use the differential remote
sense, the output of the remote sense buffer can be disabled
(high impedance) by pulling VSENSN within 800mV of VCC.
FN6325.2
November 29, 2012
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| ISL8118IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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