参数资料
型号: ISL8118IRZ
厂商: Intersil
文件页数: 15/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 28-QFN
标准包装: 60
PWM 型: 电压模式
输出数: 1
频率 - 最大: 2MHz
占空比: 100%
电源电压: 2.97 V ~ 22 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-VFQFN 裸露焊盘
包装: 管件
产品目录页面: 1244 (CN2011-ZH PDF)
ISL8118
VSENSE-
(REMOTE)
VSENSE+
(REMOTE)
VOUT (LOCAL)
10 Ω
GND (LOCAL)
10 Ω
R OS
R FB
C SEN
Z IN
Z FB
VCC
VSENSN
VSENSP
VDIFF
FB
COMP
800mV
OV/UV
COMP
ERROR AMP
GAIN = 1
V SS
FIGURE 6. SIMPLIFIED UNITY GAIN DIFFERENITAL SENSING IMPLEMENTATION
As the VDIFF pin is connected internally to the
OV/UV/PGOOD comparator, an external resistor divider
must then be connected to VDIFF to provide correct voltage
information for the OV/UV comparator. An RC filter should
be used if VDIFF is to be connected directly to FB instead of
ISL8118
V IN
to VOUT through a separate resistor divider network. This
filter prevents noise injection from disturbing the
TGATE
LX
Q1
L O
V OUT
OV/UV/PGOOD comparators on VDIFF. VDIFF may also be
connected to the SS pin, which completely bypasses the
OV/UV/PGOOD functionality.
BGATE
Q2
C IN
C O
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
PGND
RETURN
FIGURE 7. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
Proper grounding of the IC is important for correct operation in
noisy environments. The PGND pin should be connected to
board ground at the source of the bottom side MOSFET with a
wide short trace. The GND pin should be connected to a large
copper fill under the IC which is subsequently connected to
board ground at a quite location on the board, typically found
at an input or output bulk (electrolytic) capacitor.
Figure 7 shows the critical power components of the
converter. To minimize the voltage overshoot/undershoot the
interconnecting wires indicated by heavy lines should be part
of ground or power plane in a printed circuit board. The
components shown in Figure 8 should be located as close
SS
ISL8118
BOOT
C BOOT
LX
D1
+V IN
Q1 L
O
V OUT
together as possible. Please note that the capacitors CIN
+5V
Q2
C O
and CO each represent numerous physical capacitors.
Locate the ISL8118 within 3 inches of the MOSFETs, Q1 and
Q2. The circuit traces for the MOSFETs’ gate and source
C SS
GND
PVCC
PGND
C PVCC
connections from the ISL8118 must be sized to handle up to
4A peak current.
FIGURE 8. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
15
FN6325.2
November 29, 2012
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