参数资料
型号: ISL8204MIRZ-T
厂商: Intersil
文件页数: 17/21页
文件大小: 0K
描述: IC BUCK SYNC ADJ 4A 15QFN
产品培训模块: Solutions for Industrial Control Applications
标准包装: 500
类型: 非隔离(POL)
输出数: 1
电压 - 输入(最小): 1V
电压 - 输入(最大): 20V
Voltage - Output 1: 0.6 ~ 6 V
电流 - 输出(最大): 4A
电源(瓦) - 制造商系列: 24W
安装类型: 表面贴装
封装/外壳: 15-BQFN
尺寸/尺寸: 0.59" L x 0.59" W x 0.14" H(15.0mm x 15.0mm x 3.5mm)
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
效率: 95%
电源(瓦特)- 最大: 24W
ISL8204M, ISL8206M
Thermal Vias
A grid of 1.0mm to 1.2mm pitch thermal vias, which drops down
and connects to buried copper plane(s), should be placed under
the thermal land. The vias should be about 0.3mm to 0.33mm in
diameter with the barrel plated to about 1.0 ounce copper.
Although adding more vias (by decreasing via pitch) will improve
the thermal performance, diminishing returns will be seen as
more and more vias are added. Simply use as many vias as
practical for the thermal land size and your board design rules
Reflow Parameters
Due to the low mount height of the QFN, "No Clean" Type 3 solder
paste per ANSI/J-STD-005 is recommended. Nitrogen purge is
also recommended during reflow. A system board reflow profile
depends on the thermal mass of the entire populated board, so it
is not practical to define a specific soldering profile just for the
QFN. The profile given in Figure 30 is provided as a guideline, to
be customized for varying manufacturing practices and
applications.
allow.
Stencil Pattern Design
Reflowed solder joints on the perimeter I/O lands should have
about a 50μm to 75μm (2mil to 3mil) standoff height. The solder
300
250
PEAK TEMPERATURE +230°C~+245°C;
TYPICALLY 60s-70s ABOVE +220°C
KEEP LESS THAN 30s WITHIN 5°C OF PEAK TEMP.
paste stencil design is the first step in developing optimized,
reliable solder joints. Stencil aperture size to land size ratio
should typically be 1:1. The aperture width may be reduced
slightly to help prevent solder bridging between adjacent I/O
lands. To reduce solder paste volume on the larger thermal
lands, it is recommended that an array of smaller apertures be
200 SLOW RAMP (3°C/s MAX)
AND SOAK FROM +100°C
TO +180°C FOR 90s~120s
150
100
used instead of one large aperture. It is recommended that the
stencil printing area cover 50% to 80% of the PCB layout pattern.
A typical solder stencil pattern is shown in the Package Outline
50
RAMP RATE ≤ 1.5°C FROM +70°C TO +90°C
Drawing L15.15x15 on page 20. The gap width between pad to
pad is 0.6mm. The user should consider the symmetry of the
0
0
100
150
200
250
300
350
whole stencil pattern when designing its pads. A laser cut,
stainless steel stencil with electropolished trapezoidal walls is
recommended. Electropolishing “smooths” the aperture walls
resulting in reduced surface friction and better paste release
which reduces voids. Using a trapezoidal section aperture (TSA)
also promotes paste release and forms a "brick like" paste
deposit that assists in firm component placement. A 0.1mm to
0.15mm stencil thickness is recommended for this large pitch
(1.3mm) QFN.
17
DURATION (s)
FIGURE 30. TYPICAL REFLOW PROFILE
FN6999.3
July 26, 2012
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