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| 型号： | ISL8502AEVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR ISL8502 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 4.4V |
| 电流 - 输出： | 2A |
| 输入电压： | 5V，5.5 ~ 14 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 500kHz ~ 1.2MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板，文档 |
| 已用 IC / 零件： | ISL8502 |
ISL8502A
Increasing the value of inductance reduces the ripple current and
voltage. However, the large inductance values reduce the
converter response time to a load transient.
One of the parameters limiting converter response to a load
transient is the time required to change the inductor current.
Given a sufficiently fast control loop design, the ISL8502A
provides either 0% or 100% duty cycle in response to a load
transient. The response time is the time required to slew the
inductor current from an initial current value to the transient
current level. During this interval, the difference between the
inductor current and the transient current level must be
supplied by the output capacitor. Minimizing the response time
can minimize the output capacitance required.
The response time to a transient is different for the application of
load and the removal of load. Equation 9 gives the approximate
response time interval for application and removal of a transient
load:
Feedback Compensation
Figure 36 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage (V OUT )
is regulated to the reference voltage level. The error amplifier
output (V E/A ) is compared with the oscillator (OSC) triangular
wave to provide a pulse-width modulated (PWM) wave with an
amplitude of V IN at the PHASE node. The PWM wave is smoothed
by the output filter (L O and C O ).
The modulator transfer function is the small-signal transfer
function of V OUT /V E/A . This function is dominated by a DC gain
and the output filter (L O and C O ), with a double pole break
frequency at F LC and a zero at F ESR . The DC gain of the
modulator is simply the input voltage (V IN ) divided by the
peak-to-peak oscillator voltage, DV OSC . The ISL8502A
incorporates a feed-forward loop that accounts for changes in the
input voltage. This configuration maintains a constant modulator
gain.
t RISE =
L x I TRAN
VIN - VOUT
t FALL =
L x I TRAN
VOUT
(EQ. 9)
OSC
DRIVER
V IN
where: I TRAN is the transient load current step, t RISE is the
response time to the application of load, and t FALL is the
response time to the removal of load. The worst-case response
Δ V OSC
PWM
COMPARATOR
-
+
DRIVER
L O
PHASE
C O
V OUT
time can be either at the application or removal of load. Be sure
to check both of these equations at the minimum and maximum
output levels for the worst-case response time.
Z FB
ESR
(PARASITIC)
Input Capacitor Selection
V E/A
-
+
Z IN
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use small ceramic capacitors for
ERROR
AMP
REFERENCE
high-frequency decoupling, and bulk capacitors to supply the
current needed each time the upper MOSFET turns on. Place the
DETAILED COMPENSATION COMPONENTS
small ceramic capacitors physically close to the MOSFETs and
between the drain of the upper MOSFET and the source of the
lower MOSFET.
C 2
C 1
R 2
Z FB
C 3
Z IN
R 3
V OUT
The important parameters for bulk input capacitance are the
voltage rating and the RMS current rating. For reliable operation,
select bulk capacitors with voltage and current ratings above the
maximum input voltage and largest RMS current required by the
COMP
-
FB
R 1
circuit. Their voltage rating should be at least 1.25x greater than
the maximum input voltage, while a voltage rating of 1.5x is a
conservative guideline. For most cases, the RMS current rating
ISL8502A
+
REFERENCE
R 4
requirement for the input capacitor of a buck regulator is
V OUT = 0.6 × ? 1 + ------ 1 - ?
approximately one-half the DC load current.
The maximum RMS current through the input capacitors can be
closely approximated using Equation 10:
? R ?
? R 4 ?
FIGURE 36. VOLTAGE-MODE BUCK CONVERTER COMPENSATION
× ? 1 – ----------- ? + ------ × ? ----------------------------- × -------------- ? ?
V IN ?
L × f OSC
-------------- × ? I OUT ?
V IN ? ? V IN ? ?
f LC = -------------------------------------------
f ESR = --------------------------------------------
V OUT ? 2 V OUT 1 ? V IN – V OUT V OUT ? 2 ?
MAX 12
(EQ. 10)
For a through-hole design, several electrolytic capacitors may be
needed. For surface mount designs, solid tantalum capacitors
DESIGN AND OUTPUT VOLTAGE SELECTION
Modulator Break Frequency Equations
1 1
2 π x LO x CO 2 π x ESR x C O
(EQ. 11)
can be used, but caution must be exercised with regard to the
capacitor surge current rating. These capacitors must be capable
of handling the surge current at power-up. Some capacitor series
available from reputable manufacturers are surge current tested.
16
The compensation network consists of the error amplifier
(internal to the ISL8502A) and the impedance networks, Z IN and
Z FB . The goal of the compensation network is to provide a closed
loop transfer function with the highest 0dB crossing frequency
FN7940.0
October 21, 2011
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| ISL8502AIRZ | 功能描述:IC REG BUCK SYNC ADJ 2A 24QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
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| ISL8502AIRZ-TR5194 | 制造商:Intersil Corporation 功能描述:PACHINKO INTEGRATED FET SYNCH BUCK - 4X4 24LD QFN, T&R - Tape and Reel 制造商:Intersil Corporation 功能描述:IC REG BUCK SYNC ADJ 2A 24QFN |
| ISL8502EVAL1Z | 功能描述:EVALUATION BOARD FOR ISL8502 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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