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参数资料
| 型号： | ISL8723EVAL1 |
| 厂商： | Intersil |
| 文件页数： | 4/14页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 1 FOR ISL8723 |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 1 |
| 系列： | * |
ISL8723, ISL8724
Absolute Maximum Ratings
Thermal Information
V DD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
Thermal Resistance (Typical, Notes 1, 2)
θ JA (°C/W)
θ JC (°C/W)
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V DD +6V
UVLO, ENABLE, ENABLE, SYSRST . . . . . . . . -0.3V to V DD +0.3V
RESET, DLY_ON, DLYOFF . . . . . . . . . . . . . . . . -0.3V to V DD +0.3V
Operating Conditions
24 Ld 4x4 QFN Package . . . . . . . . . . . 48 9
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . +125°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
V DD Supply Voltage Range . . . . . . . . . . . . . . . . . . . . +2.5V to +5.0V
Temperature Range (T A ) . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
3. All voltages are relative to GND, unless otherwise specified.
Electrical Specifications
V DD = 3.3V to +5V, T A = T J = -40°C to +85°C, Unless Otherwise Specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
UVLO
Undervoltage Lockout Falling Threshold
Undervoltage Lockout Falling Threshold
Undervoltage Lockout Hysteresis
Undervoltage Lockout Threshold Range
Undervoltage Lockout Delay
Transient Filter Duration
V UVLOvth
V UVLOvth
V UVLOhys
RUVLOvth
t UVLOdel
tFIL
T A = T J = +25°C
Max V UVLOvth - Min V UVLOvth
ENABLE satisfied
V DD , UVLO, ENABLE glitch filter
619
604
-
-
-
-
631
631
9
6
10
7
647
656
-
18
-
-
mV
mV
mV
mV
ms
μs
DELAY ON/OFF
Delay Charging Current
Delay Charging Current Range
Delay Threshold Voltage
DLY_ichg
DLY_ichg_r
DLY_Vth
V DLY = 0V
DLY_ichg(max) - DLY_ichg(min)
0.9
-
1.21
1
0.01
1.273
1.115
0.05
1.32
μA
μA
V
ENABLE/ENABLE, RESET AND SYSRST I/O
ENABLE Threshold
ENABLE Threshold
ENABLE/ENABLE Hysteresis
ENABLE/ENABLE Lockout Delay
ENABLE/ENABLE Input Capacitance
RESET Pull-up Voltage
RESET Pull-Down Current
RESET Delay after GATE High
RESET Output Low
V ENh
V ENh
V ENh - V ENl
t delEN_LO
C IN_EN
V PU_RST
I RSTpd5
T RSTdel
V RSTl
Measured at V DD = 5V
Measured at V DD = 5V
UVLO satisfied, EN to DLY_ON
V DD = 5V, RST = 0.1V
GATE = V DD + 5V
Measured at V DD = 5V, 1mA
-
-
-
-
-
-
-
-
-
1.28
0.5 V DD
0.1
10
5
V DD
13
160
-
1.35
-
0.2
-
-
-
-
-
0.1
V
V
V
ms
pF
V
mA
ms
V
sourcing current
RESET Output Capacitance
SYSRST Pull-up Voltage
C OUT_RST
V PU_SRST
-
-
10
V DD - 0.5V
-
-
pF
V
SYSRST Pull-up Current
SYSRST Pull Down Current
I PU_SRST
I PU_5
V DD = 3.3V, SYSRST = 0.5V
V DD = 5V
-
-
12
2.7
-
-
μA
μA
4
FN6413.1
April 22, 2009
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