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参数资料
| 型号： | ISL89165FBECZ |
| 厂商： | Intersil |
| 文件页数： | 12/15页 |
| 文件大小： | 0K |
| 描述： | MOSFET DRIVER 2CH 6A 8SOIC |
| 标准包装： | 980 |
| 配置： | 低端 |
| 输入类型： | 反相和非反相 |
| 延迟时间： | 25ns |
| 电流 - 峰： | 6A |
| 配置数： | 2 |
| 输出数： | 2 |
| 电源电压： | 7.5 V ~ 16 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 供应商设备封装： | 8-SOIC-EP |
| 包装： | 管件 |
ISL89163, ISL89164, ISL89165
General PCB Layout Guidelines
The AC performance of the ISL89163, ISL89164, ISL89165
depends significantly on the design of the PC board. The
following layout design guidelines are recommended to achieve
optimum performance:
? Place the driver as close as possible to the driven power FET.
? Understand where the switching power currents flow. The high
amplitude di/dt currents of the driven power FET will induce
significant voltage transients on the associated traces.
? Keep power loops as short as possible by paralleling the
source and return traces.
? Use planes where practical; they are usually more effective
than parallel traces.
? Avoid paralleling high amplitude di/dt traces with low level
signal lines. High di/dt will induce currents and consequently,
noise voltages in the low level signal lines.
? When practical, minimize impedances in low level signal
circuits. The noise, magnetically induced on a 10k ? resistor, is
10x larger than the noise on a 1k ? resistor.
General EPAD Heatsinking
Considerations
The thermal pad is electrically connected to the GND supply
through the IC substrate. The EPAD of the ISL89163, ISL89164,
ISL89165 has two main functions: to provide a quiet GND for the
input threshold comparators and to provide heat sinking for the
IC. The EPAD must be connected to a ground plane and no
switching currents from the driven FET should pass through the
ground plane under the IC.
Figure 20 is a PCB layout example of how to use vias to remove
heat from the IC through the EPAD.
For maximum heatsinking, it is recommended that a ground
plane, connected to the EPAD, be added to both sides of the PCB.
A via array, within the area of the EPAD, will conduct heat from
the EPAD to the GND plane on the bottom layer. The number of
vias and the size of the GND planes required for adequate
heatsinking is determined by the power dissipated by the
ISL89163, ISL89164, ISL89165, the air flow and the maximum
temperature of the air around the IC.
? Be aware of magnetic fields emanating from transformers and
inductors. Gaps in the magnetic cores of these structures are
especially bad for emitting flux.
? If you must have traces close to magnetic devices, align the
traces so that they are parallel to the flux lines to minimize
coupling.
? The use of low inductance components such as chip resistors
EPAD GND
PLANE
EPAD GND
PLANE
COMPONENT
LAYER
and chip capacitors is highly recommended.
? Use decoupling capacitors to reduce the influence of parasitic
inductance in the V DD and GND leads. To be effective, these
caps must also have the shortest possible conduction paths. If
vias are used, connect several paralleled vias to reduce the
inductance of the vias.
? It may be necessary to add resistance to dampen resonating
parasitic circuits especially on OUTA and OUTB. If an external
gate resistor is unacceptable, then the layout must be
improved to minimize lead inductance.
? Keep high dv/dt nodes away from low level circuits. Guard
banding can be used to shunt away dv/dt injected currents
from sensitive circuits. This is especially true for control circuits
that source the input signals to the ISL89163, ISL89164,
ISL89165.
? Avoid having a signal ground plane under a high amplitude
dv/dt circuit. This will inject di/dt currents into the signal
ground paths.
? Do power dissipation and voltage drop calculations of the
power traces. Many PCB/CAD programs have built in tools for
calculation of trace resistance.
? Large power components (Power FETs, Electrolytic caps, power
resistors, etc.) will have internal parasitic inductance which
cannot be eliminated.
This must be accounted for in the PCB layout and circuit design.
? If you simulate your circuits, consider including parasitic
components especially parasitic inductance.
12
BOTTOM
LAYER
FIGURE 20. TYPICAL PCB PATTERN FOR THERMAL VIAS
FN7707.3
March 7, 2012
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相关代理商/技术参数 |
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| ISL89165FBECZ-T | 功能描述:MOSFET DRIVER 2CH 6A 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:6,000 系列:* |
| ISL89165FRTAZ | 功能描述:MOSFET DRIVER 2CH 3.3V 6A 8TDFN RoHS:是 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:6,000 系列:* |
| ISL89165FRTAZ-T | 功能描述:MOSFET DRIVER 2CH 3.3V 6A 8TDFN RoHS:是 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:6,000 系列:* |
| ISL89165FRTBZ | 功能描述:MOSFET DRIVER 2CH 5.0V 6A 8TDFN RoHS:是 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:6,000 系列:* |
| ISL89165FRTBZ-T | 功能描述:MOSFET DRIVER 2CH 5.0V 6A 8TDFN RoHS:是 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:6,000 系列:* |
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