参数资料
型号: ISL9443IRZ-T
厂商: Intersil
文件页数: 17/23页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32-QFN
标准包装: 6,000
PWM 型: 电流模式
输出数: 3
频率 - 最大: 1.32MHz
电源电压: 4.5 V ~ 26 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: *
包装: *
ISL9443
Gate Control Logic
The gate control logic translates generated PWM signals into
gate drive signals providing amplification, level shifting and
shoot-through protection. The gate drivers have circuitry that
helps optimize the IC performance over a wide range of
operational conditions. As MOSFET switching times can vary
dramatically from type to type and with input voltage, the gate
control logic provides adaptive dead-time by monitoring real gate
waveforms of both the upper and lower MOSFETs. Shoot-through
control logic provides a 16ns dead-time to ensure that both the
upper and lower MOSFETs will not turn on simultaneously
causing a shoot-through condition.
Gate Drivers
The low-side gate drivers are supplied from VCC_5V and provide
a peak sink current of 2A and source current of 800mA for each
PWM channel. The high-side gate drivers are also capable of
delivering the same currents as the low-side gate drivers.
Gate-drive voltage for the upper N-Channel MOSFETs are
generated by flying capacitor boot circuits. A boot capacitor
connected from the BOOT pin to the PHASE node provides power
to the high-side MOSFET driver. To limit the peak current in the IC,
Adaptive Dead-Time
The ISL9443 incorporates an adaptive dead-time algorithm on
the synchronous buck PWM controllers that optimizes operation
with varying MOSFET conditions. This algorithm provides
approximately 16ns of dead-time between switching the upper
and lower MOSFET’s. This dead-time is adaptive and allows
operation with different MOSFET’s without having to externally
adjust the dead-time using a resistor or capacitor. During turn-off
of the lower MOSFET, the LGATE voltage is monitored until it
reaches a threshold of 1V, at which time the UGATE is released to
rise. Adaptive dead-time circuitry monitors the upper MOSFET
gate voltage during UGATE turn-off. Once the upper MOSFET
gate-to-source voltage has dropped below a threshold of 1V, the
LGATE is allowed to rise.
Internal Bootstrap Diode
The ISL9443 has integrated bootstrap diodes to help reduce total
cost and reduce layout complexity. Simply adding an external
capacitor across the BOOT and PHASE pins completes the
bootstrap circuit. The bootstrap capacitor must have a maximum
voltage rating above the maximum input voltage plus 5V. The
bootstrap capacitor can be chosen from Equation 6.
C BOOT ≥ ---------------------
an external resistor may be placed between the BOOT pin and the
boot capacitor. This small series resistor also damps any
oscillations caused by the resonant tank of the parasitic
Q GATE
Δ V BOOT
(EQ. 6)
inductances in the traces of the board and the FET’s input
capacitance.
At start-up, the low-side MOSFET turns on first and forces PHASE
to ground in order to charge the BOOT capacitor to 5V. After the
low-side MOSFET turns off, the high-side MOSFET is turned on by
closing an internal switch between BOOT and UGATE. This
provides the necessary gate-to-source voltage to turn on the
upper MOSFET, an action that boosts the 5V gate drive signal
above VIN. The current required to drive the upper MOSFET is
drawn from the internal 5V regulator.
For optimal EMI performance or reducing phase node ringing, a
small resistor might be placed between these pins to the positive
terminal of the bootstrap capacitors.
OPTIONAL
Where Q GATE is the amount of gate charge required to fully
charge the gate of the upper MOSFET. The Δ V BOOT term is defined
as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate charge
(QGATE) of 25nC at 5V and also assume the droop in the drive
voltage over a PWM cycle is 200mV. One will find that a
bootstrap capacitance of at least 0.125μF is required. The next
larger standard value capacitance of 0.22μF should be used. A
good quality ceramic capacitor is recommended.
The internal bootstrap Schottky diodes have a resistance of 1.5 ?
(typ) at 800mA. Combined with the resistance RBOOT, this could
lead to the boot capacitor charging insufficiently in cases where
the bottom MOSFET is turned on for a very short time. If such
circumstances are expected, an additional external Schottky
VCC_5V
EXTERNAL
SCHOTTKY
VIN
diode may be added from VCC_5V to the positive of the boot
capacitor. RBOOT may still be necessary to lower EMI due to fast
turn-on of the upper MOSFET.
BOOT
UGATE
PHASE
R BOOT
C B
Power-Good Indicator
The PGOOD pin can be used to indicate the status of the outputs.
PGOOD will be true (open drain) when all three FB pins are within
±11% of the internal voltage reference.
Protection Circuits
The converter outputs are monitored and protected against
ISL9443
FIGURE 21. UPPER GATE DRIVER CIRCUIT
17
overload, short circuit and undervoltage conditions.
Undervoltage Lockout
The ISL9443 includes UVLO protection which keeps the device in
a reset condition until a proper operating voltage is applied. It
also shuts down the ISL9443 if the operating voltage drops
below a pre-defined value. All controllers are disabled when UVLO
FN7663.1
February 24, 2012
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