参数资料
| 型号： | ISL97649BIRZ |
| 厂商： | Intersil |
| 文件页数： | 13/20页 |
| 文件大小： | 0K |
| 描述： | IC POWER MANAGEMENT |
| 标准包装： | 75 |
| 系列： | * |
ISL97649B
VCOM Amplifier
The VCOM amplifier is designed to control the voltage on the
back plane of an LCD display. This plate is capacitively coupled to
the pixel drive voltage, which alternately cycles positive and
negative at the line rate for the display. Thus, the amplifier must
be capable of sourcing and sinking pulses of current, which can
Current Sink
Figure 16 shows the schematic of the POS pin current sink. The
circuit is made up of amplifier A1, transistor Q1, and resistor
R SET , which form a voltage controlled current source.
A VDD A VDD
occasionally be quite large (in the range of 100mA for typical
applications).
POS
R 1
V OUT
The ISL97649B VCOM amplifier output current is limited to
225mA typical. This limit level, which is roughly the same for
sourcing and sinking, is included to maintain reliable operation
of the part. It does not necessarily prevent a large temperature
rise if the current is maintained. (In this case, the whole chip may
V DCP
A1
Q1
V SAT
RSET
R 2
V SET = (I OUT )*(R SET ) = V DCP
be shut down by the thermal trip to protect functionality.) If the
display occasionally demands current pulses higher than this
limit, the reservoir capacitor will provide the excess and the
amplifier will top the reservoir capacitor back up once the pulse
has stopped. This will happen in the μs time scale in practical
systems and for pulses 2 or 3 times the current limit, the VCOM
voltage will have settled again before the next line is processed.
R SET
I OUT
FIGURE 16. CURRENT SINK CIRCUIT
The external R SET resistor sets the full-scale sink current that
determines the lowest output voltage of the external voltage
divider, R 1 and R 2 . I OUT is calculated as shown by Equation 13:
I OUT = ---------------- = ? ---------------------------------------------------- ? ? ---------------- ? ? --------------- ?
? 256 ? ? 20 ? ? R ?
DCP (Digitally Controlled Potentiometer)
Figure 15 shows the relationship between the register value and
R SET SET
V DCP RegisterValue + 1 A VDD 1
(EQ. 13)
the resistor string of the DCP. Note that the register value of zero
actually selects the first step of the resistor string. The output
voltage of DCP is given by Equation 12:
The maximum value of I OUT can be calculated by substituting the
maximum register value of 255 into Equation 13, resulting in
Equation 14:
V DCP = ? ---------------------------------------------------- ? ? ---------------- ?
I OUT ( MAX ) = ----------------------
RegisterValue + 1 A VDD
? 256 ? ? 20 ?
(EQ. 12)
A VDD
20R SET
(EQ. 14)
Equation 13 can also be used to calculate the unit sink current
A VDD
REGISTER VALUE
step size by removing the Register Value term from it, as shown
in Equation 15.
( 256 ) ( 20 ) ( R SET )
A VDD
19R
255
A VDD
I STEP = -----------------------------------------------
(EQ. 15)
20
254
The voltage difference between the POS and RSET pins, which
are the drain and source, respectively, of the output transistor,
253
252
V DCP
should be greater than the minimum saturation voltage for the
I OUT( MAX) being used. This difference keeps the output transistor
in its saturation region. The maximum voltage on the RSET pin is
R
251
2
A VDD /20, and this voltage is added to the minimum voltage
difference between the V OUT and RSET pins to calculate the
minimum V OUT voltage, as shown in Equation 16.
V OUT ( MIN ) ≥ ---------------- + MinimumSaturationVoltage
1
A VDD
20
(EQ. 16)
0
Output Voltage
The output voltage, V OUT , can be calculated with Equation 17:
V OUT = -------------------------------- ? ? 1 – ---------------------------------------------------- × ----------------------------- ? (EQ. 17)
( R U + R L )
FIGURE 15. SIMPLIFIED SCHEMATIC OF DIGITALLY CONTROLLED
POTENTIOMETER (DCP)
13
R L ? V AVDD RegisterValue + 1 R U
? 256 20 ( RSET ) ?
Where R L , R U and RSET in Equation 15 correspond to the R 7 , R 8
and R 9 in Application Diagram on page 2.
FN7927.2
June 27, 2013
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