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参数资料
| 型号： | IT80C51-12D |
| 厂商： | ATMEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | 1 MM HEIGHT, QFP-44 |
| 文件页数： | 73/109页 |
| 文件大小： | 10824K |
| 代理商： | IT80C51-12D |
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51
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
PCINT2: Pin Change Interrupt source 2. The PA2 pin can serve as an external interrupt source for pin
change interrupt 0.
Port A, Bit 3 – ADC3/PCINT3
ADC3: Analog to Digital Converter, Channel 3.
PCINT3: Pin Change Interrupt source 3. The PA3 pin can serve as an external interrupt source for pin
change interrupt 0.
Port A, Bit 4 – ADC4/PCINT4
ADC4: Analog to Digital Converter, Channel 4.
PCINT4: Pin Change Interrupt source 4. The PA4 pin can serve as an external interrupt source for pin
change interrupt 0.
Port A, Bit 5 – ADC5/PCINT5
ADC5: Analog to Digital Converter, Channel 5.
PCINT5: Pin Change Interrupt source 5. The PA5 pin can serve as an external interrupt source for pin
change interrupt 0.
Port A, Bit 6 – ADC6/SS/PCINT6
ADC6: Analog to Digital Converter, Channel 6.
SS: Slave Select Input. Regardless of DDA6, this pin is automatically configured as an input when SPI is
enabled as a slave. The data direction of this pin is controlled by DDA6 when SPI is enabled as a master.
PCINT6: Pin Change Interrupt source 6. The PA6 pin can serve as an external interrupt source for pin
change interrupt 0.
Port A, Bit 7 – ADC7/OC0B/ICP1/T1/SCL/SCK/PCINT7
ADC7: Analog to Digital Converter, Channel 7.
OC0B: Output Compare Match output. The PA7 pin can serve as an external output for the Timer/Counter0
Compare Match B. The pin has to be configured as an output (DDA7 set (one)) to serve this function. This is
also the output pin for the PWM mode timer function.
ICP1: Input Capture Pin. The PA7 pin can act as an Input Capture Pin for Timer/Counter1.
T1: Timer/Counter1 counter source.
SCL: TWI Clock. The pin is disconnected from the port and becomes the serial clock for the TWI when
TWEN in TWSCRA is set. In this mode of operation, the pin is driven by an open drain driver with slew rate
limitation and a spike filter.
SCK: SPI Master Clock Output / Slave Clock Input. Regardless of DDA7, this pin is automatically configured
as an input when SPI is enabled as a slave. The data direction of the pin is controlled by DDA7 when SPI is
enabled as a master.
PCINT7: Pin Change Interrupt source 7. The PA7 pin can serve as an external interrupt source for pin
change interrupt 0.
Table 10-4 and Table 10-5 relate the alternate functions of Port A to the overriding signals shown in Figure 10-6 on page
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