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参数资料
| 型号： | K6F2008V2E-YF70 |
| 元件分类： | SRAM |
| 英文描述： | 256K X 8 STANDARD SRAM, 70 ns, PDSO32 |
| 封装： | 8 X 13.40 MM, TSOP1-32 |
| 文件页数： | 4/9页 |
| 文件大小： | 130K |
| 代理商： | K6F2008V2E-YF70 |
Revision 1.0
K6F2008V2E Family
4
September 2001
CMOS SRAM
RECOMMENDED DC OPERATING CONDITIONS1)
Note:
1. Industrial Product: TA=-40 to 85
°C, unless otherwise specified.
2. Overshoot: Vcc+2.0V in case of pulse width
≤20ns.
3. Undershoot: -2.0V in case of pulse width
≤20ns.
4. Overshoot and undershoot are sampled, not 100% tested.
Item
Symbol
Min
Typ.
Max
Unit
Supply voltage
Vcc
3.0
3.3
3.6
V
Ground
Vss
0
V
Input high voltage
VIH
2.2
-
Vcc+0.22)
V
Input low voltage
VIL
-0.23)
-
0.6
V
CAPACITANCE1) (f=1MHz, TA=25
°C)
1. Capacitance is sampled, not 100% tested
Item
Symbol
Test Condition
Min
Max
Unit
Input capacitance
CIN
VIN=0V
-
8
pF
Input/Output capacitance
CIO
VIO=0V
-
10
pF
DC AND OPERATING CHARACTERISTICS
1. Typical values are measured at VCC=3.3V, TA=25
°C and not 100% tested.
Item
Symbol
Test Conditions
Min
Typ
Max
Unit
Input leakage current
ILI
VIN=Vss to Vcc
-1
-
1
A
Output leakage current
ILO
CS1=VIH or CS2=VIL or OE=VIH or WE=VIL, VIO=Vss to Vcc
-1
-
1
A
Average operating current
ICC1
Cycle time=1
s, 100% duty, IIO=0mA, CS1≤0.2V,
CS2
≥VCC-0.2V, VIN≤0.2V or VIN≥VCC-0.2V
-
3
mA
ICC2
Cycle time=Min, 100% duty, IIO=0mA, CS1=VIL, CS2=VIH,
VIN=VIL or VIH
-
35
mA
Output low voltage
VOL
IOL=2.1mA
-
0.4
V
Output high voltage
VOH
IOH =-1.0mA
2.4
-
V
Standby Current(CMOS)
ISB1
CS1
≥Vcc-0.2V, CS2≥Vcc-0.2V(CS1 controlled) or
CS2
≤0.2V(CS2 controlled), Other inputs=0~Vcc
-
0.51)
10
A
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