参数资料
型号: KMPC8560PX667LB
厂商: Freescale Semiconductor
文件页数: 10/36页
文件大小: 0K
描述: IC MPU POWERQUICC III 783-FCPBGA
标准包装: 2
系列: MPC85xx
处理器类型: 32-位 MPC85xx PowerQUICC III
速度: 667MHz
电压: 1.2V
安装类型: 表面贴装
封装/外壳: 784-BBGA,FCBGA
供应商设备封装: 783-FCPBGA(29x29)
包装: 托盘
18
MPC8560 PowerQUICC III
MOTOROLA
Integrated Communications Processor Product Brief
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Power Management
The RapidIO unit on the MPC8560 supports the I/O and message-passing logical specifications, the
common transport specification, and the 8/16 LP-LVDS physical layer specification of the RapidIO
Interconnect Specification. It does not support the globally shared memory logical specification.
Highlights of the implementation include: support for four priority levels and ordering within a priority
level, CRC error management, 32- to 256-byte transactions and 8-bit data width ports.
The physical layer of the RapidIO unit can operate at up to 500 MHz. Because the interface is defined as a
source-synchronous, double-data-rate, LVDS-signaling interconnect, the theoretical unidirectional peak
bandwidth is 8 Gbps. Receive and transmit ports operate independently, resulting in an aggregate theoretical
bandwidth of 16 Gbps.
3.13.1 RapidIO Message Unit
The MPC8560’s RapidIO messaging supports one inbox/outbox structure for data and one doorbell
structure for messages. Both chaining and direct modes are provided for the outbox, and messages can hold
up to 16 packets of 256 bytes, or a total of 4 Kbytes.
3.14 Power Management
In addition to low-voltage operation and dynamic power management in its execution units, the MPC8560
supports four power consumption modes: full-on, doze, nap, and sleep. The three low-power modes: doze,
nap, and sleep, can be entered under software control in the e500 core or by external masters accessing a
configuration register.
Doze mode suspends execution of instructions in the e500 core. The core is left in a standby mode in which
cache snooping and time base interrupts are still enabled. Device logic external to the processor core is fully
functional in this mode.
Nap mode shuts down clocks to all the e500 functional units except the time base, which can be disabled
separately. No snooping is performed in nap mode, but the device logic external to the processor core is fully
functional.
Sleep mode shuts down not only the e500 core, but all of the MPC8560 I/O interfaces as well. Only the
interrupt controller and power management logic remain enabled so that the device can be awakened.
3.15 Clocking
The MPC8560 takes in the PCI_CLK/SYSCLK signal as an input to the device PLL and multiplies it by an
integer from 1 to 16 to generate the core complex bus clock (the platform clock), which operates at the same
frequency as the DDR DRAM data rate (for example, 266 or 333 MHz). The L2 cache also operates at this
frequency. The e500 core uses the CCB clock as an input to its PLL, which multiplies it again by 2, 2.5, 3,
or 3.5 to generate the core clock.
DLLs are used in the DDR SDRAM controller and the local bus memory controller (LBC) to generate
memory clocks. Six differential clock pairs are generated for DDR SDRAMs. Two clock outputs are
generated for the LBC.
The RapidIO transmit clock may be sourced from one of three locations: the platform clock, the RapidIO
receive clock, or a special differential clock input. This input is designed to receive inputs from an external
clock synthesis device driving a clock with a frequency of up to 500 MHz.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相关PDF资料
PDF描述
IDT70V3389S6PRF8 IC SRAM 1.125MBIT 6NS 128TQFP
KMPC8560CVT667JB IC MPU POWERQUICC III 783-FCPBGA
KMPC8560CPX667JB IC MPU POWERQUICC III 783-FCPBGA
KMPC855TZQ80D4 IC MPU POWERQUICC 80MHZ 357-PBGA
XC4085XL-3BG432I IC FPGA I-TEMP 3.3V 3SPD 432MBGA
相关代理商/技术参数
参数描述
KMPC8560PX667LC 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560PX833LB 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560PX833LC 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560PXAQFB 功能描述:微处理器 - MPU PQ 3 DRACO-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560VT667LB 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324