参数资料
型号: KMPC8560PX667LB
厂商: Freescale Semiconductor
文件页数: 2/36页
文件大小: 0K
描述: IC MPU POWERQUICC III 783-FCPBGA
标准包装: 2
系列: MPC85xx
处理器类型: 32-位 MPC85xx PowerQUICC III
速度: 667MHz
电压: 1.2V
安装类型: 表面贴装
封装/外壳: 784-BBGA,FCBGA
供应商设备封装: 783-FCPBGA(29x29)
包装: 托盘
10
MPC8560 PowerQUICC III
MOTOROLA
Integrated Communications Processor Product Brief
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
e500 Core Overview
Two simple execution units that perform the following:
— Single-cycle add and subtract
— Single-cycle shift and rotate
— Single-cycle logical operations
— Supports integer signal processing operations
Multiple-cycle execution unit (MU)
— Four-cycle latency for integer and floating-point multiplication (including integer, fractional,
and both vector and scalar floating-point multiply instructions).
— Variable-latency divide: 4, 11, 19, and 35 cycles for all Book E, SPE, and SPFP divide
instructions. Note that the MU allows divide instructions to bypass the second two MU pipeline
stages, freeing those stages for other MU instructions to execute in parallel.
— Four-cycle floating-point multiply
— Four-cycle floating-point add and subtract
Signal processing engine APU (SPE APU). The SIMD capability provided by the 64-bit execution
units (MIU, LSU, SIU1) is not a separate execution unit. The hardware that executes 32-bit Book
E instructions also executes the lower half of 64-bit SPU instructions.
— Single-cycle integer add and subtract
— Single-cycle logical operations
— Single-cycle shift and rotate
— Four-cycle integer pipelined multiplies
— 4-, 11-, 19-, and 35-cycle integer divides
— Four-cycle single instruction multiple data (SIMD) pipelined multiply-accumulate (MAC)
— 64-bit accumulator for MAC operations
— Single-precision floating-point operations
Load/store unit (LSU)
— Three-cycle load latency
— Fully pipelined
— Four-entry load queue allows up to four load misses before stalling
— Can continue servicing load hits when load queue is full
— Six-entry store queue allows full pipelining of stores
Cache coherency
— Bus support for hardware-enforced coherency (bus snooping)
Core complex bus (CCB)
— High-speed, on-chip local bus with data tagging
— 32-bit address bus
— 60x-like address protocol with address pipelining and retry/copyback
— Two general-purpose read data, one write data bus
— 128-bit data plus parity/tags (each data bus)
— Supports out-of-order reads, in-order writes
— Little to no data bus arbitration logic required for native systems
— Easily adaptable to 60x-like environments
— Supports one-level pipelining of addresses with address-retry responses
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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KMPC8560PX667LC 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560PX833LB 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560PX833LC 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560PXAQFB 功能描述:微处理器 - MPU PQ 3 DRACO-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8560VT667LB 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324