参数资料
型号: KS8993F
厂商: Micrel Inc
文件页数: 63/99页
文件大小: 0K
描述: IC CONV MED 10/100 3PORT 128PQFP
标准包装: 66
系列: *
类型: *
应用: *
安装类型: 表面贴装
封装/外壳: 128-BFQFP
供应商设备封装: 128-PQFP(14x20)
配用: KS8993F-EVAL-ND - EVAL KIT EXPERIMENTAL KS8993F
KS8993F
Micrel
August 26, 2004
Revision 1.0
- 66 -
Note: This register is managed by the Center side.
Register 66 (0x42): Center Side Command
Bit
Name
R/W
Description
Default
7–5
Timer
Delay
R/W
000 = Reserved (Do Not Use)
001 = 32us (default)
010 = 128us
011 = 256us
100 = 512us
101 = 1ms
110 = 2m
111 = 4ms
001
4
Com4
R/W
0
3
Com3
R/W
0
2
Com2
R/W
0
1
Com1
R/W
0
Com0
R/W
To send a maintenance frame, an external controller writes to these command
bits via the SMI, SPI, or I2C interface.
0 0000 : No request
0 0001 : Send “Condition Inform Request” frame
0 0010 : Send “Loop Mode Start Request” frame
0 0100 : Send “Loop Mode Stop Request” frame
0 1000 : Send “Remote Command”. Here, the Maintenance frame will be
made
up of the “Condition Inform Request/Reply” frame, but the My Model
Info bits MM24-MM47 will be mapped to Registers 4Ah-4Ch, instead
of Registers 55h-57h.
1 0000 : Send “Indicate Center/Terminal MC Condition” frame. Usually,
“Indicate Center/Terminal MC Condition” frame will be sent
automatically. But this OAM frame can be sent manually using this
command.
Other values : N/A
Note
Except for the “Indicate Center/Terminal MC Condition” frame, all
maintenance frames here are sent by the Center side MC only.
0
Register 67 (0x43): PHY-SW Initialize
Bit
Name
R/W
Description
Default
7
P2 SPEED
R/W
1 = 100Mbps
0 = 10Mbps
This bit share the same physical register as Reg. 2Ch bit 6.
P2SPD pin
value during
reset
6
P2 DUPLEX
R/W
1 = Full duplex
0 = Half duplex
This bit share the same physical register as Reg. 2Ch bit 5.
P2DPX pin
value during
reset
5
P2 Auto
Negotiation
R/W
1 = AN enable
0 = AN disable
This bit share the same physical register as Reg. 2Ch bit 7.
P2ANEN
pin value
during reset
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