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| 型号： | KSZ8841-16MBL |
| 厂商： | Micrel Inc |
| 文件页数： | 72/105页 |
| 文件大小： | 0K |
| 描述： | IC MAC CTLR 1PORT ETH 100-LBGA |
| 标准包装： | 260 |
| 控制器类型： | 以太网控制器，MAC |
| 接口： | 总线 |
| 电源电压： | 3.1 V ~ 3.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LBGA |
| 供应商设备封装： | 100-LFBGA |
| 包装： | 托盘 |
| 产品目录页面： | 1080 (CN2011-ZH PDF) |
| 其它名称： | 576-3075 |
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Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
69
M9999-102207-1.6
Bank 18 Interrupt Status Register (0x02): ISR
This register contains the status bits for all QMU and other interrupt sources.
When the corresponding enable bit is set, it causes the interrupt pin to be asserted.
This register is usually read by the host CPU and device drivers during interrupt service routine or polling. The register
bits are not cleared when read. The user has to write “1” to clear
Bit
Default Value
R/W
Description
15
0x0
RO
(W1C)
LCIS Link Change Interrupt Status
When this bit is set, it indicates that the link status has changed from link up to link down, or
link down to link up.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
14
0x0
RO
(W1C)
TXIS Transmit Status
When this bit is set, it indicates that the TXQ MAC has transmitted at least a frame on the
MAC interface and the QMU TXQ is ready for new frames from the host.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
13
0x0
RO
(W1C)
RXIS Receive Interrupt Status
When this bit is set, it indicates that the QMU RXQ has received a frame from the MAC
interface and the frame is ready for the host CPU to process.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
12
0x0
RO
(W1C)
TXUIS Transmit Underrun Interrupt Status
When this bit is set, it indicates that the transmit underrun condition has occurred.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
11
0x0
RO
(W1C)
RXOIS Receive Overrun Interrupt Status
When this bit is set, it indicates that the Receive Overrun status has occurred.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
10
0x0
RO
(W1C)
RXEIS Receive Early Receive Interrupt Status
When this bit is set, it indicates that the Early Receive status has occurred.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
9
0x1
RO
(W1C)
TXPSIE Transmit Process Stopped Status
When this bit is set, it indicates that the Transmit Process has stopped.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
8
0x1
RO
(W1C)
RXPSIE Receive Process Stopped Status
When this bit is set, it indicates that the Receive Process has stopped.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
7
0x0
RO
(W1C)
RXEFIE Receive Error Frame Interrupt Status
When this bit is set, it indicates that the Receive error frame status has occurred.
This edge-triggered interrupt status is cleared by writing 1 to this bit.
6-0
-
RO
Reserved.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| KSZ8841-16MBL-EVAL | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Single-Port Ethernet MAC Controller with Non-PCI Interface |
| KSZ8841-16MBLI | 功能描述:以太网 IC 10/100BT Ethernet MAC + PHY with Generic (8, 16-Bit) Bus Interface (I-Temp) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8841-16MQL | 功能描述:以太网 IC Single Ethernet Port + Generic (8, 16-bit) bus interface( Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8841-16MQL A6 | 功能描述:IC MAC CTRLR 8/16BIT 128-PQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| KSZ8841-16MQL-EVAL | 功能描述:以太网开发工具 KSZ8841-16MQL Evaluation Board RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
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