参数资料
型号: KSZ8864RMN
厂商: Micrel Inc
文件页数: 29/111页
文件大小: 0K
描述: IC ETHERNET SW 4PORT 64QFN
标准包装: 348
控制器类型: 以太网开关控制器
接口: MII,RMII
电源电压: 1.8V,2.5V,3.3V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
供应商设备封装: 64-QFN(8x8)
包装: 托盘
配用: 576-3869-ND - BOARD EVALUATION FOR KSZ8864RMN
其它名称: 576-3787
KSZ8864RMN-ND
Micrel, Inc.
KSZ8864RMN
April 2012
24
M9999-043012-1.5
On-Chip Termination Resistors
The KSZ8864RMN reduces board cost and simplifies board layout by using on-chip termination resistors for RX/TX
differential pairs without the external termination resistors. The solution of the on chip termination and internal biasing will
enhance much power consumption compare with using external biasing and termination resistors, and the transformer will
not consume power any longer. The center tap doesn’t need to be tied to analog power, just leave them floating or
connect the capacitors to ground separately.
Functional Overview: Power Management
The KSZ8864RMN can also use multiple power level of 3.3V, 2.5V or 1.8V for VDDIO to support different I/O voltage.
The KSZ8864RMN supports enhanced power management feature in low power state with energy detection to ensure
low-power dissipation during device idle periods. There are five operation modes under the power management function
which is controlled by the Register 14 bit [4:3] and the Port Register Control 13 bit3 as shown below:
Register 14 bit [4:3] = 00 Normal Operation Mode
Register 14 bit [4:3] = 01 Energy Detect Mode
Register 14 bit [4:3] = 10 Soft Power Down Mode
Register 14 bit [4:3] = 11 Power Saving Mode
The Port Register Control 13 bit 3 =1 is for the Port Based Power-Down Mode
Table 2 indicates all internal function blocks status under four different power management operation modes.
Power Management Operation Modes
KSZ8864RMN
Function Blocks
Normal Mode
Power Saving Mode
Energy Detect Mode
Soft Power Down Mode
Internal PLL Clock
Enabled
Disabled
Tx/Rx PHY
Enabled
Rx unused block disabled
Energy detect at Rx
Disabled
MAC
Enabled
Disabled
Host Interface
Enabled
Disabled
Table 2. Internal Function Block Status
Normal Operation Mode
This is the default setting bit [4:3] =00 in register 14 after the chip power-up or hardware reset. When KSZ8864RMN is in
this normal operation mode, all PLL clocks are running, PHY and MAC are on and the host interface is ready for CPU
read or write.
During the normal operation mode, the host CPU can set the bit [4:3] in register 14 to transit the current normal operation
mode to any one of the other three power management operation modes.
Energy Detect Mode
The energy detect mode provides a mechanism to save more power than in the normal operation mode when the
KSZ8864RMN is not connected to an active link partner. In this mode, if the cable is not plugged, then the KSZ8864RMN
can automatically enter to a low power state, i.e., the energy detect mode. In this mode, KSZ8864RMN will keep
transmitting 120ns width pulses at 1 pulse/s rate. Once activity resumes due to plugging a cable or attempting by the far
end to establish link, the KSZ8864RMN can automatically power up to normal power state in energy detect mode.
Energy detect mode consists of two states, normal power state and low power state. While in low power state, the
KSZ8864RMN reduces power consumption by disabling all circuitry except the energy detect circuitry of the receiver. The
energy detect mode is entered by setting bit [4:3] = 01 in register 14. When the KSZ8864RMN is in this mode, it will
monitor the cable energy. If there is no energy on the cable for a time longer than pre-configured value at bit [7:0] Go-
Sleep time in register 15, then the KSZ8864RMN will go into a low power state. When KSZ8864RMN is in low power
state, it will keep monitoring the cable energy. Once the energy is detected from the cable, KSZ8864RMN will enter
normal power state. When KSZ8864RMN is at normal power state, it is able to transmit or receive packet from the cable.
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