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| 型号： | KSZ8864RMN |
| 厂商： | Micrel Inc |
| 文件页数： | 39/111页 |
| 文件大小： | 0K |
| 描述： | IC ETHERNET SW 4PORT 64QFN |
| 标准包装： | 348 |
| 控制器类型： | 以太网开关控制器 |
| 接口： | MII，RMII |
| 电源电压： | 1.8V，2.5V，3.3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN（8x8） |
| 包装： | 托盘 |
| 配用： | 576-3869-ND - BOARD EVALUATION FOR KSZ8864RMN |
| 其它名称： | 576-3787 KSZ8864RMN-ND |
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1997 Microchip Technology Inc.
DS30444E - page 33
PIC16C9XX
5.2
PORTB and TRISB Register
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a bit
in the TRISB register puts the corresponding output
driver in a hi-impedance input mode. Clearing a bit in
the TRISB register puts the contents of the output latch
on the selected pin(s).
EXAMPLE 5-2:
INITIALIZING PORTB
BCF
STATUS, RP0
; Select Bank0
BCF
STATUS, RP1
CLRF
PORTB
; Initialize PORTB
BSF
STATUS, RP0
;
MOVLW
0xCF
; Value used to
; initialize data
; direction
MOVWF
TRISB
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is
performed by clearing bit RBPU (OPTION<7>). The
weak pull-up is automatically turned off when the port
pin is congured as an output. The pull-ups are also dis-
abled on a Power-on Reset.
FIGURE 5-3:
BLOCK DIAGRAM OF
RB3:RB0 PINS
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins congured as inputs can
cause this interrupt to occur (i.e. any RB7:RB4 pin con-
gured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
Data Latch
RBPU(2)
P
VDD
Q
D
CK
Q
D
CK
Q
D
EN
Data bus
WR Port
WR TRIS
RD TRIS
RD Port
weak
pull-up
RD Port
RB0/INT
I/O
pin(1)
TTL
Input
Buffer
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS bit
and clear the RBPU bit (OPTION<7>).
Schmitt Trigger
Buffer
TRIS Latch
PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Inter-
rupt with ag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
Any read or write of PORTB. This will end the
mismatch condition.
b)
Clear ag bit RBIF.
A mismatch condition will continue to set ag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow ag bit RBIF to be cleared.
This interrupt on mismatch feature, together with soft-
ware congurable pull-ups on these four pins allow
easy interface to a keypad and make it possible for
wake-up on key-depression. Refer to the
Embedded
Control Handbook, "Implementing Wake-Up on Key
Stroke" (AN552).
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 5-4:
BLOCK DIAGRAM OF
RB7:RB4 PINS
Data Latch
From other
RBPU(2)
P
VDD
I/O
Q
D
CK
Q
D
CK
Q
D
EN
Q
D
EN
Data bus
WR Port
WR TRIS
Set RBIF
TRIS Latch
RD TRIS
RD Port
RB7:RB4 pins
weak
pull-up
RD Port
Latch
TTL
Input
Buffer
pin(1)
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS bit
and clear the RBPU bit (OPTION<7>).
ST
Buffer
RB7:RB6 in serial programming mode
Q3
Q1
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