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参数资料
| 型号： | LB11875 |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 0.03 A, PDSO36 |
| 封装： | 0.275 INCH, SSOP-36 |
| 文件页数： | 10/16页 |
| 文件大小： | 164K |
| 代理商： | LB11875 |
No. 7678-3/16
LB11875
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[CSD Oscillator]
High-level output voltage
VOH (CSD)
3.2
3.5
3.8
V
Low-level output voltage
VOL (CSD)
0.9
1.1
1.3
V
External capacitor charge current 1
ICHG1
–13
–10
–7
A
External capacitor charge current 2
ICHG2
7
10
13
A
Oscillator frequency
f (CSD)
C = 0.068 F
30
Hz
Amplitude
V (CSD)
2.2
2.4
2.6
Vp-p
[Phase Comparator Output]
High-level output voltage
VPDH
IOH = –100 A
VREG – 0.2
VREG – 0.1
V
Low-level output voltage
VPDL
IOH = 100 A
0.2
0.3
V
Output source current
IPD+
VPD = VREG/2
–0.6
mA
Output sink current
IPD–
VPD = VREG/2
1.5
mA
[Phase Lock Detection Output]
Output saturation voltage
VOL (LD)
ILD = 10 mA
0.15
0.4
V
Output leakage current
IL (LD)
VO = VCC
10
A
[Error Amplifier (ERR) Block]
Input offset voltage
VIO (ER)
Design target value
–10
+10
mV
Input bias current
IB (ER)
–0.4
+0.4
A
High-level output voltage
VOH (ER)
IEI = –0.1 mA, no load
3.7
V
Low-level output voltage
VOL (ER)
IEI = 0.1 mA, no load
1.3
V
DC bias level
VB (ER)
Design target value
–5%
VREG/2
+5%
V
[Current Limiter Circuit]
Limiter voltage
VRF
0.225
0.25
0.275
V
[Low-voltage Protection Circuit]
Operating voltage
VSDL
3.5
3.7
3.9
V
Release voltage
VSDH
4.0
4.2
4.4
V
Hysteresis width
VSD
0.35
0.5
0.65
V
[Thermal Shutdown Operation]
Thermal shutdown operating temperature
TSD
Design target value (junction temperature)
150
180
°C
Hysteresis width
TSD
Design target value (junction temperature)
30
°C
[CLD Circuit]
External capacitor charge current
ICLD
–5
–4
–3
A
Operating voltage
VH (CLD)
3.25
3.5
3.75
V
[CLKIN Pin]
External signal input frequency
fI (CKIN)
0.1
10
kHz
High-level input voltage
VIH (CKIN)
2.0
VREG
V
Low-level input voltage
VIL (CKIN)
0
1.0
V
Input open voltage
VIO (CKIN)
VREG – 0.5
VREG
V
Hysteresis width
VIS (CKIN)
0.13
0.21
0.29
V
High-level input current
IIH (CKIN)
VCKIN = VREG
–10
0
+10
A
Low-level input current
IIL (CKIN)
VCKIN = 0 V
–130
–90
A
[S/S Pin]
High-level input voltage
VIH (SS)
2.0
VREG
V
Low-level input voltage
VIL (SS)
0
1.0
V
Input open voltage
VIO (SS)
VREG – 0.5
VREG
V
Hysteresis width
VIS (SS)
0.13
0.21
0.29
V
High-level input current
IIH (SS)
VS/S = VREG
–10
0
+10
A
Low-level input current
IIL (SS)
VS/S = 0 V
–130
–90
A
Continued on next page.
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