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参数资料
| 型号： | LB11875 |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 0.03 A, PDSO36 |
| 封装： | 0.275 INCH, SSOP-36 |
| 文件页数： | 15/16页 |
| 文件大小： | 164K |
| 代理商： | LB11875 |
No. 7678-8/16
LB11875
Pin Functions
Pin No.
Pin
Pin Function
Equivalent circuit
External clock signal input
Low: 0 V to 1.0 V
High: 2.0 V to VREG
When open, this pin goes to the high level.
Hysteresis: About 0.21 V
f = 10 kHz maximum
1
CLK
VREG
50 k
5 k
1
FG Schmitt trigger output
This is an open collector output.
2
FGS
VREG
2
Phase lock detection output
This pin goes to the on state (low level) when the PLL
phase is locked.
This is an open collector output.
3
LD
VREG
3
Start/stop control
Low: 0 to 1.0 V
High: 2.0 V to VREG
When open, this pin goes to the high level.
A low level specifies the start state.
Hysteresis: About 0.21 V
4
S/S
VREG
50 k
5 k
4
Clock divisor selection
Low: 0 V to 1.0 V
High: 2.0 V to VREG
When open, this pin goes to the high level.
When low, a divisor of 2 is used, and when high or open, a
divisor of 1 is used.
Hysteresis: About 0.21 V
5
CLK
SEL
VREG
50 k
5 k
5
Continued on next page.
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