参数资料
型号: LC5512MC-75QN208I
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: PLD
中文描述: EE PLD, 9.5 ns, PQFP208
封装: LEAD FREE, PLASTIC, QFP-208
文件页数: 28/95页
文件大小: 923K
代理商: LC5512MC-75QN208I
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
34
tCASC
Additional Delay for
PT Cascading
between MFBs
0.71
0.80
0.89
0.92
1.33
ns
tCICOMFB
Carry Chain Delay,
MFB to MFB
0.35
0.39
0.44
0.46
0.66
ns
tCICOMC
Carry Chain Delay,
Macro-Cell to
Macro-Cell
0.10
0.11
0.13
0.13
0.19
ns
tFLAG
Routing Delay for
Extended Function
Flags
2.62
2.94
3.27
3.40
4.91
ns
tFLAGEXP
Additional Flag
Delay when
Expanding Data
Widths
tFLAGFULL,
tFLAGAFULL,
tFLAGEMPTY,
tFLAGAEMPTY
2.57
2.89
3.21
3.34
4.82
ns
tSUM
Counter Sum Delay
tPTSA
0.80
0.90
1.00
1.04
1.50
ns
Optional Adjusters
tBLA
Block Loading
Adder
tROUTE
0.04
0.04
0.05
0.05
0.07
ns
tEXP
PT Expander Adder
tROUTE
0.53
0.60
0.66
0.69
0.99
ns
tINDIO
Additional Delay for
the Input Register
tINREG
0.50
0.56
0.63
0.65
0.94
ns
tPLL_SEC_DELAY
Secondary PLL
Output Delay
tPLL_DELAY
0.91
0.91
0.91
0.91
0.91
ns
tINEXP
MFB Input Extender
tROUTE
0.62
0.70
0.78
0.81
1.16
ns
Input and Output Buffer Delays
tIOI
Input Buffer Selec-
tion Adder
tGCLK_IN, tIN,
tGOE, tRST
Refer to sysIO Adjuster Tables
ns
tIOO
Output Buffer
Selection Adder
tBUF
ns
FIFO
tFIFOWCLKS
Write Data Setup
before Write Clock
Time
-0.27
-0.27
-0.22
-0.22
-0.21
ns
tFIFOWCLKH
Write Data Hold
after Write Clock
Time
-0.01
-0.01
-0.01
-0.01
-0.01
ns
tFIFOCLKSKEW
Opposite Clock
Cycle Delay
1.40
1.40
1.76
1.76
1.83
ns
tFIFOFULL
Write Clock to Full
Flag Delay
3.08
3.08
3.85
3.85
4.00
ns
tFIFOAFULL
Write Clock to
Almost Full Flag
Delay
3.08
3.08
3.86
3.86
4.01
ns
tFIFOEMPTY
Read Clock to
Empty Flag Delay
3.08
3.08
3.86
3.86
4.01
ns
tFIFOAEMPTY
Read Clock to
Almost Empty Flag
Delay
3.08
3.08
3.86
3.86
4.01
ns
ispXPLD 5000MX Family Internal Switching Characteristics (Continued)
Over Recommended Operating Conditions
Parameter
Description
Base
Parameter
-4
-45
-5
-52
-75
Units
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
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