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参数资料
| 型号： | LC72151V |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO30 |
| 封装： | SSOP-30 |
| 文件页数： | 27/29页 |
| 文件大小： | 326K |
| 代理商： | LC72151V |
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No. 6976-7/29
LC72151V
Pin Functions
Pin No.
Symbol
Usage
Function
Pin circuit
Crystal oscillator connection.
(10.25 or 10.35 MHz)
30
1
XIN
XOUT
X’tal OSC
FMIN is selected by setting DVS in the control data to 1.
Enters high-speed locking mode by setting SNS in the control data
to 1.
Enters normal mode by setting SNS in the control data to 0.
Input frequency: 10 to 160 MHz
The signal is transmitted to the swallow counter.
The divisor can be set to a value in the range 272 to 65,535.
8
FMIN
Local oscillator signal input
AMIN is selected by setting DVS in the control data to 0.
When SNS in the control data is set to 1:
Input frequency: 2 to 40 MHz
The signal is directly transmitted to the swallow counter.
When SNS in the control data is set to 0:
Input frequency: 0.5 to 10 MHz
The signal is directly transmitted to the 12-bit programmable divider.
The divisor can be set to a value in the range 5 to 4,095.
9
AMIN
Local oscillator signal input
This pin must be set to the high level when inputting serial data to the
LC72151V DI pin and when outputting serial data from the DO pin.
29
CE
Chip enable
S
Serial data input for transferring data from the controller to the
LC72151V.
28
DI
Input data
S
Data synchronization clock signal used when inputting serial data to
the LC72151V DI pin and when outputting serial data from the DO pin.
27
CL
Clock
S
Serial data output for transferring data from the LC72151V to the
controller.
26
DO
Output data
LC72151V power supply. A voltage in the range 4.5 to 5.5 V must be
provided when the PLL circuit is operating.
The power-on reset circuit operates when power is first applied.
Note: Power must be applied to AVDD before applied to VDD and
AVDD must be higher than or equal to VDD.
———
6
VDD
Power
LC72151V ground.
7
VSS
Ground
Input/output dual function pins
The function will be selected according to IOC1 and IOC2 in the
control data.
Data = 0: Input port
1: Output port
When specified as an input port:
The input pin state is transmitted to the system microcontroller from
DO pin.
Input state = Low: data is 0
= High: data is 1.
When specified as an output port:
The output state will be determined according to I/O-1 and I/O-2 in
the control data.
Data = 0: Low
= 1: Open
These pin function as an input port at a power-on reset.
2
3
I/O-1
I/O-2
I/O ports
Continued on next page.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LC72151VS-MPB-E | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Ammo Pack |
| LC72151VS-TRM-E | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| LC7215F | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:MW/LW PLL Frequency Synthesizers |
| LC7215FM | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:MW/LW PLL Frequency Synthesizers |
| LC7216M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
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