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参数资料
| 型号： | lCL8052CDD |
| 厂商： | Intersil Corporation |
| 英文描述： | Precision 4 1/2 Digit, A/D Converter |
| 中文描述： | 精密4 1 / 2位，A / D转换 |
| 文件页数： | 1/19页 |
| 文件大小： | 168K |
| 代理商： | LCL8052CDD |
3-34
Features
Typically Less Than 2
μ
V
P-P
Noise (200.00mV Full
Scale, lCL8068)
Accuracy Guaranteed to
±
1 Count Over Entire
±
20,000
Counts (2.0000V Full Scale)
Guaranteed Zero Reading for 0V Input
True Polarity at Zero Count for Precise Null Detection
Single Reference Voltage Required
Over-Range and Under-Range Signals Available for
Auto-Ranging Capability
All Outputs TTL Compatible
Medium Quality Reference, 40ppm (Typ) on Board
Blinking Display Gives Visual Indication of Over
Range
Six Auxiliary Inputs/Outputs are Available for
Interfacing to UARTs, Microprocessors or Other
Complex Circuitry
5pA Input Current (Typ) (8052A)
Description
The ICL8052 or ICL8068/lCL71C03 chip pairs with their
multiplexed BCD output and digit drivers are ideally suited
for the visual display DVM/DPM market. The outstanding
4
1
/
2
digit accuracy, 200.00mV to 2.0000V full scale capabil-
ity, auto-zero and auto-polarity combine with true ratiometric
operation, almost ideal differential linearity and time-proven
dual slope conversion. Use of these chip pairs eliminates
clock feedthrough problems, and avoids the critical board
layout usually required to minimize charge injection.
When only 2000 counts of resolution are required, the 71C03
can be wired for 3
1
/
2
digits and give up to 30 readings/sec.,
making it ideally suited for a wide variety of applications.
The ICL71C03 is an improved CMOS plug-in replacement for
the lCL7103 and should be used in all new designs.
Pinouts
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
ICL8052CPD
0 to 70
14 Ld PDIP
E14.3
lCL8052CDD
0 to 70
14 Ld CERDIP
F14.3
lCL8052ACPD
0 to 70
14 Ld PDIP
E14.3
ICL8052ACDD
0 to 70
14 Ld CERDIP
F14.3
ICL8068CDD
0 to 70
14 Ld CERDIP
F14.3
ICL8068ACDD
0 to 70
14 Ld CERDIP
F14.3
lCL8068ACJD
0 to 70
14 Ld CERDIP
F14.3
ICL71C03CPl
0 to 70
28 Ld PDIP
E28.6
lCL71C03ACPl
0 to 70
28 Ld PDIP
E28.6
ICL8052/ICL8068
(CERDIP, PDIP)
TOP VIEW
ICL71C03 (PDIP)
TOP VIEW
V-
COMP OUT
REF CAP
REF BYPASS
GND
REF OUT
REF SUPPLY
INT OUT
+BUFF IN
+INT IN
-INT IN
-BUFF IN
BUFF OUT
V++
1
2
3
4
5
6
7
14
13
12
11
10
9
8
-1.2V
V
REF
ICL8052/
ICL8068
V+
4
1
/
2
/ 3
1
/
2
POL
RUN/HOLD
COMP IN
V-
REFERENCE
REF. CAP. 1
REF. CAP. 2
ANALOG IN
ANALOG GND
CLOCK IN
UNDER-RANGE
OVER-RANGE
BUSY
D
2
D
3
D
4
B
8
(MSB)
B
4
B
2
B
1
(LSB)
D
5
(MSD)
STROBE
A-Z IN
A-Z OUT
DIGITAL GND
D
1
(LSD)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
August 1997
ICL8052/ICL71C03,
ICL8068/ICL71C03
Precision 4
1
/
2
Digit, A/D Converter
File Number
3081.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
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