参数资料
型号: LCMXO2280C-3BN256I
厂商: Lattice Semiconductor Corporation
文件页数: 2/88页
文件大小: 0K
描述: IC PLD 2280LUTS 211I/O 256CABGA
标准包装: 119
系列: MachXO
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 5.1ns
电压电源 - 内部: 1.71 V ~ 3.465 V
宏单元数: 1140
输入/输出数: 211
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 256-LFBGA,CSPBGA
供应商设备封装: 256-CABGA(14x14)
包装: 托盘
其它名称: 220-1073
MachXO Family Data Sheet
Introduction
November 2012
Features
? Non-volatile, Infinitely Reconfigurable
? Instant-on – powers up in microseconds
? Single chip, no external configuration memory
required
? Excellent design security, no bit stream to ?
intercept
? Reconfigure SRAM based logic in milliseconds
? SRAM and non-volatile memory programmable
through JTAG port
? Supports background programming of ?
non-volatile memory
? Sleep Mode
? Allows up to 100x static current reduction
? TransFR? Reconfiguration (TFR)
? In-field logic update while system operates
? High I/O to Logic Density
? 256 to 2280 LUT4s
? 73 to 271 I/Os with extensive package options
? Density migration supported
? Lead free/RoHS compliant packaging
? Embedded and Distributed Memory
? Up to 27.6 Kbits sysMEM? Embedded Block
RAM
? Up to 7.7 Kbits distributed RAM
? Dedicated FIFO control logic
Table 1-1. MachXO Family Selection Guide
Data Sheet DS1002
? Flexible I/O Buffer
? Programmable sysIO? buffer supports wide
range of interfaces:
? LVCMOS 3.3/2.5/1.8/1.5/1.2
? LVTTL
? PCI
? LVDS, Bus-LVDS, LVPECL, RSDS
? sysCLOCK? PLLs
? Up to two analog PLLs per device
? Clock multiply, divide, and phase shifting
? System Level Support
? IEEE Standard 1149.1 Boundary Scan
? Onboard oscillator
? Devices operate with 3.3V, 2.5V, 1.8V or 1.2V
power supply
? IEEE 1532 compliant in-system programming
Introduction
The MachXO is optimized to meet the requirements of
applications traditionally addressed by CPLDs and low
capacity FPGAs: glue logic, bus bridging, bus interfac-
ing, power-up control, and control logic. These devices
bring together the best features of CPLD and FPGA
devices on a single chip.
Device
LUTs
Dist. RAM (Kbits)
EBR SRAM (Kbits)
Number of EBR SRAM Blocks (9 Kbits)
V CC Voltage
Number of PLLs
Max. I/O
LCMXO256
256
2.0
0
0
1.2/1.8/2.5/3.3V
0
78
LCMXO640
640
6.1
0
0
1.2/1.8/2.5/3.3V
0
159
LCMXO1200
1200
6.4
9.2
1
1.2/1.8/2.5/3.3V
1
211
LCMXO2280
2280
7.7
27.6
3
1.2/1.8/2.5/3.3V
2
271
Packages
100-pin TQFP (14x14 mm)
144-pin TQFP (20x20 mm)
100-ball csBGA (8x8 mm)
132-ball csBGA (8x8 mm)
256-ball caBGA (14x14 mm)
256-ball ftBGA (17x17 mm)
78
78
74
113
74
101
159
159
73
113
101
211
211
73
113
101
211
211
324-ball ftBGA (19x19 mm)
271
? 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
1-1
DS1002 Introduction_01.5
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相关代理商/技术参数
参数描述
LCMXO2280C-3FT256C 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTs 211 IO 1.8 /2.5/3.3V -3 Spd RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO2280C-3FT256I 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTs 211 IO 1.8 /2.5/3.3V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO2280C-3FT324C 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTs 271 IO 1.8 /2.5/3.3V -3 Spd RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO2280C-3FT324I 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTs 271 IO 1.8 /2.5/3.3V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
LCMXO2280C-3FTN256C 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTS 211 I/O RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100