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| 型号： | LCMXO2280C-3FT324I |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 中文描述： | FLASH PLD, 5.1 ns, PBGA324 |
| 封装： | 19 X 19 MM, FTBGA-324 |
| 文件页数： | 41/96页 |
| 文件大小： | 1389K |
| 代理商： | LCMXO2280C-3FT324I |
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June 2009
Data Sheet DS1002
2009 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
4-1
DS1002 Pinouts_01.8
Signal Descriptions
Signal Name
I/O
Descriptions
General Purpose
P[Edge] [Row/Column
Number]_[A/B/C/D/E/F]
I/O
[Edge] indicates the edge of the device on which the pad is located. Valid edge designa-
tions are L (Left), B (Bottom), R (Right), T (Top).
[Row/Column Number] indicates the PFU row or the column of the device on which the
PIO Group exists. When Edge is T (Top) or (Bottom), only need to specify Row Number.
When Edge is L (Left) or R (Right), only need to specify Column Number.
[A/B/C/D/E/F] indicates the PIO within the group to which the pad is connected.
Some of these user programmable pins are shared with special function pins. When not
used as special function pins, these pins can be programmed as I/Os for user logic.
During configuration of the user-programmable I/Os, the user has an option to tri-state the
I/Os and enable an internal pull-up resistor. This option also applies to unused pins (or
those not bonded to a package pin). The default during configuration is for user-program-
mable I/Os to be tri-stated with an internal pull-up resistor enabled. When the device is
erased, I/Os will be tri-stated with an internal pull-up resistor enabled.
GSRN
I
Global RESET signal (active low). Dedicated pad, when not in use it can be used as an I/O
pin.
TSALL
I
TSALL is a dedicated pad for the global output enable signal. When TSALL is high all the
outputs are tristated. It is a dual function pin. When not in use, it can be used as an I/O pin.
NC
—
No connect.
GND
—
GND - Ground. Dedicated pins.
VCC
—
VCC - The power supply pins for core logic. Dedicated pins.
VCCAUX
—
VCCAUX - the Auxiliary power supply pin. This pin powers up a variety of internal circuits
including all the differential and referenced input buffers. Dedicated pins.
VCCIOx
—VCCIO - The power supply pins for I/O Bank x. Dedicated pins.
SLEEPN
1
I
Sleep Mode pin - Active low sleep pin. When this pin is held high, the device operates
normally. This pin has a weak internal pull-up, but when unused, an external pull-up to
VCC is recommended. When driven low, the device moves into Sleep mode after a speci-
fied time.
PLL and Clock Functions (Used as user programmable I/O pins when not used for PLL or clock pins)
[LOC][0]_PLL[T, C]_IN
—
Reference clock (PLL) input Pads: [LOC] indicates location. Valid designations are ULM
(Upper PLL) and LLM (Lower PLL). T = true and C = complement.
[LOC][0]_PLL[T, C]_FB
—
Optional feedback (PLL) input Pads: [LOC] indicates location. Valid designations are ULM
(Upper PLL) and LLM (Lower PLL). T = true and C = complement.
PCLK [n]_[1:0]
—
Primary Clock Pads, n per side.
Test and Programming (Dedicated pins)
TMS
I
Test Mode Select input pin, used to control the 1149.1 state machine.
TCK
I
Test Clock input pin, used to clock the 1149.1 state machine.
TDI
I
Test Data input pin, used to load data into the device using an 1149.1 state machine.
TDO
O
Output pin -Test Data output pin used to shift data out of the device using 1149.1.
1. Applies to MachXO “C” devices only. NC for “E” devices.
MachXO Family Data Sheet
Pinout Information
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| LCMXO2280C-3FTN256C | 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTS 211 I/O RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LCMXO2280C-3FTN256I | 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTs 211 IO 1.8 /2.5/3.3V -3 Spd I RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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| LCMXO2280C-3M132C | 功能描述:CPLD - 复杂可编程逻辑器件 2280 LUTs 101 I/O 1.8/2.5/3.3V -3 Spd RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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