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参数资料
| 型号： | LDS8161-002-T2 |
| 厂商： | IXYS |
| 文件页数： | 11/22页 |
| 文件大小： | 0K |
| 描述： | IC LED DRIVER WHIT BCKLGT 16WQFN |
| 标准包装： | 1 |
| 系列： | LED-Sense™, PowerLite™ |
| 拓扑： | 高端，线性（LDO），PWM |
| 输出数： | 6 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光 |
| 类型 - 次要： | 白色 LED |
| 电源电压： | 2.5 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFQFN 裸露焊盘 |
| 供应商设备封装： | 16-TQFN |
| 包装： | 标准包装 |
| 工作温度： | -40°C ~ 85°C |
| 其它名称： | LDS8161-002-T2-6 |
LDS8161/41
BLOCK DIAGRAM
VIN
All Drivers 0 to 31.875 mA
Vin to
SCL
I2C Interface
Top Level Control
diagnostics
OverTemp
al l
Drivers
PWM
Shorted LED
Calibrated
SDA
32
Open LED
LED Calibration
Soft Start control
Bandgap
Voltage
Reference
1.2V
1.2V
Reference
Currents
and
ADC bias
currents
Pre-Scale
PWM
LEDA1
LEDA2
Digital Temperature
Sensor / Abritrator
10
ADC
10 bit SAR
8x, 1x, or 1/4x
PWM
Si Iforce
LED Iforce
LEDB1
SAD
1 0 uA
2 uA 1 mA
0.2 mA
Temp
De-Rating
LUT
PWM
OTP
Trim
Temp
Temp
Si PNP
temp diode
PWM
LEDB2
De-Rating
Table
Temp to PWM
adjust LUTs
PWM
8 bit to 12 bit (log) PWM
Generator
to PWM
LEDC1
(8161)
PWM
OTP
Driver
Start Up
GND
Gnd
1.8V
Vin to 1.8V LDO
for digital core
Vin
To top control
POR
1.2V
to top control & dig processing
Oscillator & Clock Generator
~ 1.2 MHz
Vin
LEDC2
(8161)
EN
Figure 2: LDS8161/41 Functional Block Diagram
selected
I C slave address, loads factory
At this point,
the I C interface is ready
for
Sense
temperature de-rating circuits and occurs
BASIC OPERATION
The LDS8161 / 41 may operate in following modes:
a) Normal Operation Mode
b) Normal Standby Mode
c) Programming Modes
d) Shutdown Mode
NORMAL OPERATION MODE
At power-up, V IN should be in the range from 2.5 V to
5.5 V (max). If V IN is slow rising, EN pin should be
logic LOW at least until V IN reaches a 2.5 V level.
When EN is taken HIGH, a soft-start power-up
sequence begins and performs an internal circuits
reset that requires less than 100 μs.
An initialization sequence then begins, taking less
than 10 ms. This sequence determines the user-
2
programmed settings, and conducts diagnostics for
open/shorted LEDs.
2
communication and the LDS8161/41 may be user-
programmed. Upon programming completion for all
required initial parameters and features’ settings, a
calibration command is given by setting bit 4 of the
Control Register (1Fh) HIGH. This starts the
calibration sequence of the LDS8161/41 LED-
TM
simultaneous with a gradual ramp-up of LED PWM
and current levels to the user programmed values.
This initialization is completed in less than 250 ms in
? 2009 IXYS Corp.
Characteristics subject to change without notice
11
Doc. No. 8141/61_DS, Rev. N1.0
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