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| 型号： | LDS8161-002-T2 |
| 厂商： | IXYS |
| 文件页数： | 6/22页 |
| 文件大小： | 0K |
| 描述： | IC LED DRIVER WHIT BCKLGT 16WQFN |
| 标准包装： | 1 |
| 系列： | LED-Sense™, PowerLite™ |
| 拓扑： | 高端，线性（LDO），PWM |
| 输出数： | 6 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光 |
| 类型 - 次要： | 白色 LED |
| 电源电压： | 2.5 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFQFN 裸露焊盘 |
| 供应商设备封装： | 16-TQFN |
| 包装： | 标准包装 |
| 工作温度： | -40°C ~ 85°C |
| 其它名称： | LDS8161-002-T2-6 |
LDS8161/41
LDS8161 / 41 REGISTERS DEFINITION AND PROGRAMMING
Note: Unlisted register addresses are for factory use only; For proper operation write only to registers defined.
ADDRESS
00h
01h
02h
03h
DESCRIPTION
Bank A Current setting
Bank B Current setting
Bank C Current setting
(8161 only; Not for 8141)
Channel Enable
(No Bits 5, 4 for C2 and
C1 respectively for 8141)
BITS
8
8
8
6
NOTES
Reg00h – Reg02h data code = (I LED / 0.125 mA) (decimal)
converted into hex format
Bits 5:0 = 1 enables LEDs C2, C1, B2, B1, A2, A1
respectively (See
Table 1). Both LEDs from one bank should be disabled to
minimize power consumption.
Log Mode:
~ – 0.17dB dimming per LSB for currents > 300 μA; Refer to
8 to 12 bit conversion curve (Figure 3 and Table 10) for
05h
Bank A, B, C PWM Duty
Cycle
8
resolution in range 0 – 300 μA
Data Code 00h = 0% Duty Cycle, FFh = 100% Duty Cycle
Example: 50% brightness reduction ( – 6dB) requires: 255 –
(– 6 dB / – 0.17 dB) = 255 – 35 = 220 (decimal) = DCh steps
19h
1Ch
1Dh
1Eh
1Fh
LED Diagnostics Test
LED Faults Status
( shorted to GND)
LED Faults Status
(shorted to V IN /open)
Configuration register
Software reset, Standby
8
5
5
8
8
See Table 2; Bit 5 = 1 sets user-initiated LED short/open
diagnostic
Bits from bit 5 to bit 0 represent LED status for LEDC2 –
LEDA1 respectively. Bit = 1 represents LED shorted to GND
Bits from bit 5 to bit 0 represent LED status for LEDC2 –
LEDA1 respectively. Bit = 1 represents LED shorted to
V IN /open
See Table 3
See Table 4
Since junction temperature is measured, the values loaded
here allow an offset to account for Tj – Ta gradient.
This allows de-rate tables to be referenced to Ta levels.
49h
Ta-Tj Temperature Offset
8
Two 4 bit offsets value for the LED and the Si Diode;
Bit [7:4] = Tj-Ta offset for the LEDs
Bit [3:0] = Tj-Ta offset for the Si diode.
Typically should set both offsets to be equal.
See Table 5 & 6
value = 11100 (bin) = 1Ch represents 105 C Tj
4Ah
LED Shutdown
Temperature
5
Defines T-code, at which LED current shuts down per LED
vendor de-rating specification (see Table 5); Factory default
0
Bit 5 = 1 – enable 2-x scale LUT ΔPWM code correction (de-
4Bh
2-x Table enable and
breakpoint (T-code)
6
rating) starting at the breakpoint set by T-code (bits 4:0)
Bit 5 = 0 – 1-x scale (default) for entire temperature range
Bit [4:0] defines T-code, where temperature de-rating starts,
Two LUT words per I C address.
or where 2-x scaling begins (see Table 5)
2
Temp De-rating LUT
25C to 100C
(one 5C step every
Each word contains two 4-bit numbers repr es enting of ΔPWM
codes. See
Table 6 and Appendix 1 for LUT programming.
56h – 5Dh
nibble)
ΔPWM code1[7:4],
ΔPWM code0[3:0] –
ΔPWM code13[7:4],
ΔPWM code12[3:0]
8
Factory default setting is Logarithmic Mode table for WLED
LED (Nichia NSSW020BT WLED).
Default table could be used for WLED de-rating.
De-Rating starts at 55oC junction.
? 2009 IXYS Corp.
Characteristics subject to change without notice
6
Doc. No. 8141/61_DS, Rev. N1.0
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